Invention Application
US20060030104A1 Integrating n-type and p-type metal gate transistors 有权
集成n型和p型金属栅晶体管

Integrating n-type and p-type metal gate transistors
Abstract:
At least a p-type and n-type semiconductor device deposited upon a semiconductor wafer containing metal or metal alloy gates. More particularly, a complementary metal-oxide-semiconductor (CMOS) device is formed on a semiconductor wafer having n-type and p-type metal gates.
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