Invention Application
US20060033110A1 Three dimensional integrated circuit and method of design 有权
三维集成电路及设计方法

Three dimensional integrated circuit and method of design
Abstract:
A three dimensional (3D) integrated circuit (IC), 3D IC chip and method of fabricating a 3D IC chip. The chip includes multiple layers of circuits, e.g., silicon insulator (SOI) CMOS IC layers, each including circuit elements. The layers may be formed in parallel and one layer attached to another to form a laminated 3D chip.
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