发明申请
US20060046367A1 Method to selectively recess ETCH regions on a wafer surface using capoly as a mask
有权
使用capoly作为掩模来选择性地在晶片表面上凹入ETCH区域的方法
- 专利标题： Method to selectively recess ETCH regions on a wafer surface using capoly as a mask
- 专利标题（中）： 使用capoly作为掩模来选择性地在晶片表面上凹入ETCH区域的方法
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申请号： US10931195申请日： 2004-08-31
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公开(公告)号： US20060046367A1公开(公告)日： 2006-03-02
- 发明人: Antonio Rotondaro , Seetharaman Sridhar
- 申请人： Antonio Rotondaro , Seetharaman Sridhar
- 主分类号： H01L21/8238
- IPC分类号： H01L21/8238
摘要：
The present invention facilitates semiconductor fabrication by providing methods of fabrication that selectively apply strain to channel regions of devices while mitigating masking operations employed. A CAPOLY layer is formed over an NMOS region of a semiconductor device (102). A recess etch is performed on active regions of devices within a PMOS region of the semiconductor device (104) and the CAPOLY layer prevents etching of devices within an NMOS region of the semiconductor device. Subsequently, an epitaxial formation process (106) is performed that forms or deposits epitaxial regions and introduces a first type of strain across the channel regions in the PMOS region. Then, the semiconductor device is annealed (108) to cause the CAPOLY layer to introduce a second type of strain across the channel regions in the NMOS region. After annealing, the CAPOLY layer is removed (110).
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