发明申请
US20060163673A1 Method and structure for providing tuned leakage current in CMOS integrated circuits
失效
在CMOS集成电路中提供调谐漏电流的方法和结构
- 专利标题： Method and structure for providing tuned leakage current in CMOS integrated circuits
- 专利标题（中）： 在CMOS集成电路中提供调谐漏电流的方法和结构
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申请号： US11340354申请日： 2006-01-26
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公开(公告)号： US20060163673A1公开(公告)日： 2006-07-27
- 发明人: Brent Anderson , Edward Nowak
- 申请人： Brent Anderson , Edward Nowak
- 申请人地址： US NY Armonk
- 专利权人： International Business Machines Corporation
- 当前专利权人： International Business Machines Corporation
- 当前专利权人地址： US NY Armonk
- 主分类号： H01L29/76
- IPC分类号： H01L29/76 ; H01L21/336
摘要：
A field effect transistor (FET) comprising an isolation layer, a source region positioned over the isolation layer, a drain region positioned over the isolation layer, a bifurcated silicide gate region positioned over the channel region, and a gate oxide layer adjacent to the gate region, wherein the gate oxide layer comprises an alkali metal ion implanted at a dosage calculated based on threshold voltage test data provided by a post silicide electrical test conducted on said FET, wherein the alkali metal ion comprises any of cesium and rubidium.