发明申请
- 专利标题： Technique for fabricating logic elements using multiple gate layers
- 专利标题（中）： 使用多个栅极层制造逻辑元件的技术
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申请号： US11435456申请日： 2006-05-16
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公开(公告)号： US20060202258A1公开(公告)日： 2006-09-14
- 发明人: Nima Mokhlesi , Jeffrey Lutze
- 申请人： Nima Mokhlesi , Jeffrey Lutze
- 专利权人： SanDisk Corporation
- 当前专利权人： SanDisk Corporation
- 主分类号： H01L29/788
- IPC分类号： H01L29/788
摘要：
Various techniques are described which utilize multiple poly-silicon layers in the design and fabrication of various logic elements that are used in semiconductor devices. According to a specific implementation of the present invention, logic gate cell sizes and memory array cell sizes may be reduced by fabricating various transistor gates using multiple poly-silicon layers. The techniques of the present invention of using multiple layers of poly-silicon to form transistor gates of logic elements provides extra degrees of freedom in fine tuning transistor parameters such as, for example, oxide thickness, threshold voltage, maximum allowed gate voltage, etc.
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