In a first aspect, a first method is provided for accessing memory. The first method includes the steps of (1) storing a bit in a cell included in a memory having a plurality of cells arranged into rows and columns, wherein each cell includes a first group of transistors adapted to store the bit and a second group of transistors adapted to affect a signal asserted during a read operation on a read bit line coupled to the cell such that the affected signal matches a value of the bit stored in the cell; and (2) preventing the value of the bit stored in the cell from changing state while the second group of transistors affects the signal asserted during the read operation on the read bit line coupled to the cell. Numerous other aspects are provided.