发明申请
- 专利标题： Method of forming electrically conductive lines in an integrated circuit
- 专利标题（中）： 在集成电路中形成导电线的方法
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申请号： US11347053申请日： 2006-02-03
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公开(公告)号： US20060267207A1公开(公告)日： 2006-11-30
- 发明人: Frank Feustel , Frank Koschinsky , Peter Huebler
- 申请人： Frank Feustel , Frank Koschinsky , Peter Huebler
- 优先权： DE102005024914.0 20050531
- 主分类号： H01L23/48
- IPC分类号： H01L23/48 ; H01L21/4763
摘要：
In a method of forming a semiconductor structure, an opening is formed in a layer of a dielectric material provided over an electrically conductive feature. An etching process is performed in order to form a recess in the electrically conductive feature. The bottom of the recess may have a rounded shape. The recess and the opening are filled with an electrically conductive material. Due to the provision of the recess, electromigration, stress migration and a local heating of the semiconductor structure, which may adversely affect the functionality of the semiconductor structure, can be reduced.
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