发明申请
- 专利标题: Semiconductor integrated circuit device
- 专利标题(中): 半导体集成电路器件
-
申请号: US11476040申请日: 2006-06-28
-
公开(公告)号: US20070001734A1公开(公告)日: 2007-01-04
- 发明人: Masafumi Onouchi , Yusuke Kanno , Hiroyuki Mizuno , Yasuhisa Shimazaki , Tetsuya Yamada
- 申请人: Masafumi Onouchi , Yusuke Kanno , Hiroyuki Mizuno , Yasuhisa Shimazaki , Tetsuya Yamada
- 专利权人: Renesas Technology Corp.
- 当前专利权人: Renesas Technology Corp.
- 优先权: JPJP2005-189102 20050629
- 主分类号: H03K3/00
- IPC分类号: H03K3/00
摘要:
A low power consumption in a semiconductor integrated circuit device can be achieved by reducing a glitch power in a flip-flop. In a pulse-generator-incorporated auto-clock-gating flip-flop in which data latch is performed by using a pulsed clock, input data is latched based on an output of a dynamic XOR circuit, which is a comparator circuit, during a period when the pulsed clock is at a high level, and the dynamic XOR circuit is cut off during a period when the pulsed clock is at a low level.