发明申请
- 专利标题： Wide-port context cache apparatus, systems, and methods
- 专利标题（中）： 宽端口上下文缓存设备，系统和方法
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申请号： US11171960申请日： 2005-06-29
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公开(公告)号： US20070005888A1公开(公告)日： 2007-01-04
- 发明人: William Halleck , Pak-lung Seto , Victor Lau
- 申请人： William Halleck , Pak-lung Seto , Victor Lau
- 专利权人： Intel Corporation
- 当前专利权人： Intel Corporation
- 主分类号： G06F12/00
- IPC分类号： G06F12/00 ; G06F12/14
摘要：
Apparatus, systems, methods, and articles may operate to restrict an order of processing of frames associated with a task context stored in at least one context cache memory location. The order of processing may be restricted by selectively locking the context for exclusive use by a selected lane in a multi-lane serial-attached small computer system interface (SAS) hardware protocol engine while the selected lane processes a selected one of the frames.
公开/授权文献
- US07376789B2 Wide-port context cache apparatus, systems, and methods 公开/授权日：2008-05-20
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