Invention Application
- Patent Title: Summing comparator for higher order class D amplifiers
- Patent Title (中): 高阶D类放大器的求和比较器
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Application No.: US11389709Application Date: 2006-03-27
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Publication No.: US20070024366A1Publication Date: 2007-02-01
- Inventor: Jagadeesh Krishnan , Srinath Ramaswamy , Gangadhar Burra
- Applicant: Jagadeesh Krishnan , Srinath Ramaswamy , Gangadhar Burra
- Main IPC: H03F3/217
- IPC: H03F3/217
Abstract:
The summing comparator includes: a first integrator; a second integrator for receiving an output of the first integrator; and a comparator for switching when the output of the first integrator is greater than the output of the second integrator. The outputs of the first and second integrators are directly compared by the comparator without the necessity of a summing amplifier.
Public/Granted literature
- US07498879B2 Summing comparator for higher order class D amplifiers Public/Granted day:2009-03-03
Information query
IPC分类:
