The present invention provides a production method for a FinFET transistor arrangement, and a corresponding FinFET transistor arrangement. The method comprises the following steps: provision of a substrate (106, 108); formation of an active region (1) on the substrate, said active region having a source region (114), a drain region (116) and an intervening fin-like channel region (113b′; 113b″) for each individual FinFET transistor; formation of a gate dielectric (11) and a gate region (13, 14, 15) over the fin-like channel region (113b′; 113b″) for each individual FinFET transistor; the formation of the fin-like channel region (113b′; 113b″) having the following steps: formation of a hard mask (S1-S4) on the active region (1), said hard mask having a pad oxide layer (30), an overlying pad nitride layer (50) and nitride sidewall spacers (7); anisotropic etching of the active layer (1) using the hard mask (S1-S4) for the formation of STI trenches (G1-G5); filling of the STI trenches (G1-G5) with an STI oxide filling (9); polishing-back of the STI oxide filling (9) as far as the top side of the hard mask (S1-S4); etching-back of the polished-back STI oxide filling (9) as far as a residual height (h′) in the STI trenches (G1-G5); selective removal of the pad nitride layer (50) and the nitride sidewall spacers (7) with respect to the pad oxide layer (30), the etched-back STI oxide filling (9) and the active region (1) for the formation of a modified hard mask (S1′-S4′); anisotropic etching of the active layer (1) using the modified hard mask (S1′-S4′) for the formation of widened STI trenches (G1′-G5′), the fin-like channel regions (113b′; 113b″) of the active region (1) remaining for each individual FinFET transistor.