发明申请
- 专利标题： Semiconductor device structure and methods of manufacturing the same
- 专利标题（中）： 半导体器件结构及其制造方法
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申请号： US11333618申请日： 2006-01-17
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公开(公告)号： US20070166887A1公开(公告)日： 2007-07-19
- 发明人: Hsien-Wei Chen , Hsueh-Chung Chen , Yi-Lung Cheng , Shin-Puu Jeng
- 申请人： Hsien-Wei Chen , Hsueh-Chung Chen , Yi-Lung Cheng , Shin-Puu Jeng
- 专利权人： Taiwan Semiconductor Manufacturing Co., Ltd.
- 当前专利权人： Taiwan Semiconductor Manufacturing Co., Ltd.
- 主分类号： H01L21/82
- IPC分类号： H01L21/82
摘要：
A method of generating a layout for a semiconductor device array is provided. A first layout is provided, comprising an active conductive feature, a boundary area surrounding the active conductive feature, and an open area other than the active conductive feature and the boundary area. A plurality of dummy templates of different pattern densities are provided, each of which comprises a plurality of dummy seeds. A second layout is generated by adding the dummy seeds on the open area according to at least one of the dummy templates.
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