发明申请
- 专利标题: SEMICONDUCTOR PACKAGE SUITABLE FOR HIGH VOLTAGE APPLICATIONS
- 专利标题(中): 适用于高压应用的半导体封装
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申请号: US11695794申请日: 2007-04-03
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公开(公告)号: US20070181984A1公开(公告)日: 2007-08-09
- 发明人: Joon-seo Son , Shi-baek Nam , O-seob Jeon
- 申请人: Joon-seo Son , Shi-baek Nam , O-seob Jeon
- 申请人地址: KR Bucheon City
- 专利权人: Fairchild Korea Semiconductor, Ltd.
- 当前专利权人: Fairchild Korea Semiconductor, Ltd.
- 当前专利权人地址: KR Bucheon City
- 优先权: KR2003-4025 20030121
- 主分类号: H01L23/495
- IPC分类号: H01L23/495
摘要:
A semiconductor package has a structure in which a leadframe pad to which a semiconductor die is attached and inner leads electrically connected to the leadframe pad are covered by a molded housing, and outer leads extending from the inner leads protrude from a side surface of the molded housing to the outside. The outer leads include a first outer lead disposed in a central portion of the molded housing, second and third outer leads respectively disposed in a right and left of the first outer lead. The second and third outer leads each have bent portions in portions where they are adjacent to the side surface of the molded housing, the bent portions protruding to increase a space between the first outer lead and the bent portions in the molded housing. At least one of the bent portions of the second and third outer leads is covered by an extended portion of the molded housing.
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