发明申请
US20070212810A1 MEMORY DEVICE AND METHOD OF MANUFACTURING THE DEVICE BY SIMULTANEOUSLY CONDITIONING TRANSITION METAL OXIDE LAYERS IN A PLURALITY OF MEMORY CELLS
有权
存储器件和通过在大量存储器单元中同时调节过渡金属氧化物层来制造器件的方法
- 专利标题: MEMORY DEVICE AND METHOD OF MANUFACTURING THE DEVICE BY SIMULTANEOUSLY CONDITIONING TRANSITION METAL OXIDE LAYERS IN A PLURALITY OF MEMORY CELLS
- 专利标题(中): 存储器件和通过在大量存储器单元中同时调节过渡金属氧化物层来制造器件的方法
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申请号: US11748579申请日: 2007-05-15
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公开(公告)号: US20070212810A1公开(公告)日: 2007-09-13
- 发明人: Toshijaru Furukawa , Mark Hakey , Steven Holmes , David Horak , Charles Koburger , Chung Lam , Gerhard Meijer
- 申请人: Toshijaru Furukawa , Mark Hakey , Steven Holmes , David Horak , Charles Koburger , Chung Lam , Gerhard Meijer
- 主分类号: H01L21/00
- IPC分类号: H01L21/00
摘要:
Disclosed are non-volatile memory devices that incorporate a series of single or double memory cells. The single memory cells are essentially “U” shaped. The double memory cells comprise two essentially “U” shaped memory cells. Each memory cell comprises a memory element having a bi-stable layer sandwiched between two conductive layers. A temporary conductor may be applied to a series of cells and used to bulk condition the bi-stable layers of the cells. Also, due to the “U” shape of the cells, a cross point wire array may be used to connect a series of cells. The cross point wire array allows the memory elements of each cell to be individually identified and addressed for storing information and also allows for the information stored in the memory elements in all of the cells in the series to be simultaneously erased using a block erase process.