公开(公告)号：US07378678B2

公开(公告)日：2008-05-27

申请号：US11748579

申请日：2007-05-15

申请人： Toshijaru Furukawa ,  Mark C. Hakey ,  Steven J. Holmes ,  David V. Horak ,  Charles W. Koburger, III ,  Chung H. Lam ,  Gerhard I. Meijer

发明人： Toshijaru Furukawa ,  Mark C. Hakey ,  Steven J. Holmes ,  David V. Horak ,  Charles W. Koburger, III ,  Chung H. Lam ,  Gerhard I. Meijer

IPC分类号： H01L47/00

CPC分类号： H01L27/101 ,  H01L27/115 ,  H01L27/2409 ,  H01L27/2463 ,  H01L45/04 ,  H01L45/1233 ,  H01L45/147 ,  Y10S438/90

摘要： Disclosed are non-volatile memory devices that incorporate a series of single or double memory cells. The single memory cells are essentially “U” shaped. The double memory cells comprise two essentially “U” shaped memory cells. Each memory cell comprises a memory element having a bi-stable layer sandwiched between two conductive layers. A temporary conductor may be applied to a series of cells and used to bulk condition the bi-stable layers of the cells. Also, due to the “U” shape of the cells, a cross point wire array may be used to connect a series of cells. The cross point wire array allows the memory elements of each cell to be individually identified and addressed for storing information and also allows for the information stored in the memory elements in all of the cells in the series to be simultaneously erased using a block erase process.

摘要翻译： 公开了包含一系列单个或双重存储器单元的非易失性存储器件。 单个存储器单元基本上是“U”形的。 双重存储单元包括两个基本上“U”形的存储单元。 每个存储单元包括具有夹在两个导电层之间的双稳态层的存储元件。 临时导体可以应用于一系列的电池并且用于批量地调节电池的双稳态层。 此外，由于电池的“U”形状，可以使用交叉点线阵列来连接一系列电池。 交叉点线阵列允许每个单元的存储元件被单独识别和寻址用于存储信息，并且还允许使用块擦除处理同时擦除存储在串联中的所有单元中的存储器元件中的信息。

公开(公告)号：US07541608B2

公开(公告)日：2009-06-02

申请号：US12030927

申请日：2008-02-14

申请人： Toshijaru Furukawa ,  Mark C. Hakey ,  Steven J. Holmes ,  David V. Horak ,  Charles W. Koburger ,  Chung H. Lam ,  Gerhard I. Meijer

发明人： Toshijaru Furukawa ,  Mark C. Hakey ,  Steven J. Holmes ,  David V. Horak ,  Charles W. Koburger ,  Chung H. Lam ,  Gerhard I. Meijer

IPC分类号： H01L47/00

CPC分类号： H01L27/101 ,  H01L27/115 ,  H01L27/2409 ,  H01L27/2463 ,  H01L45/04 ,  H01L45/1233 ,  H01L45/147 ,  Y10S438/90

摘要： Disclosed are non-volatile memory devices that incorporate a series of single or double memory cells. The single memory cells are essentially “U” shaped. The double memory cells comprise two essentially “U” shaped memory cells. Each memory cell comprises a memory element having a bi-stable layer sandwiched between two conductive layers. A temporary conductor may be applied to a series of cells and used to bulk condition the bi-stable layers of the cells. Also, due to the “U” shape of the cells, a cross point wire array may be used to connect a series of cells. The cross point wire array allows the memory elements of each cell to be individually identified and addressed for storing information and also allows for the information stored in the memory elements in all of the cells in the series to be simultaneously erased using a block erase process.

摘要翻译： 公开了包含一系列单个或双重存储器单元的非易失性存储器件。 单个存储器单元基本上是“U”形的。 双重存储单元包括两个基本上“U”形的存储单元。 每个存储单元包括具有夹在两个导电层之间的双稳态层的存储元件。 临时导体可以应用于一系列的电池并且用于批量地调节电池的双稳态层。 此外，由于电池的“U”形状，可以使用交叉点线阵列来连接一系列电池。 交叉点线阵列允许每个单元的存储元件被单独识别和寻址用于存储信息，并且还允许使用块擦除处理同时擦除存储在串联中的所有单元中的存储器元件中的信息。

公开(公告)号：US20080131995A1

公开(公告)日：2008-06-05

申请号：US12030927

申请日：2008-02-14

申请人： Toshijaru Furukawa ,  Mark C. Hakey ,  Steven J. Holmes ,  David V. Horak ,  Charles W. Koburger ,  Chung H. Lam ,  Gerhard I. Meijer

发明人： Toshijaru Furukawa ,  Mark C. Hakey ,  Steven J. Holmes ,  David V. Horak ,  Charles W. Koburger ,  Chung H. Lam ,  Gerhard I. Meijer

IPC分类号： H01L21/00

CPC分类号： H01L27/101 ,  H01L27/115 ,  H01L27/2409 ,  H01L27/2463 ,  H01L45/04 ,  H01L45/1233 ,  H01L45/147 ,  Y10S438/90

摘要： Disclosed are non-volatile memory devices that incorporate a series of single or double memory cells. The single memory cells are essentially “U” shaped. The double memory cells comprise two essentially “U” shaped memory cells. Each memory cell comprises a memory element having a bi-stable layer sandwiched between two conductive layers. A temporary conductor may be applied to a series of cells and used to bulk condition the bi-stable layers of the cells. Also, due to the “U” shape of the cells, a cross point wire array may be used to connect a series of cells. The cross point wire array allows the memory elements of each cell to be individually identified and addressed for storing information and also allows for the information stored in the memory elements in all of the cells in the series to be simultaneously erased using a block erase process.

摘要翻译： 公开了包含一系列单个或双重存储器单元的非易失性存储器件。 单个存储器单元基本上是“U”形的。 双重存储单元包括两个基本上“U”形的存储单元。 每个存储单元包括具有夹在两个导电层之间的双稳态层的存储元件。 临时导体可以应用于一系列的电池并且用于批量地调节电池的双稳态层。 此外，由于电池的“U”形状，可以使用交叉点线阵列来连接一系列电池。 交叉点线阵列允许每个单元的存储元件被单独识别和寻址用于存储信息，并且还允许使用块擦除处理同时擦除存储在串联中的所有单元中的存储器元件中的信息。

公开(公告)号：US20080185652A1

公开(公告)日：2008-08-07

申请号：US12060922

申请日：2008-04-02

申请人： Toshijaru Furukawa ,  Mark C. Hakey ,  Steven J. Holmes ,  David V. Horak ,  Charles W. Koburger ,  Chung H. Lam ,  Gerhard I. Meijer

发明人： Toshijaru Furukawa ,  Mark C. Hakey ,  Steven J. Holmes ,  David V. Horak ,  Charles W. Koburger ,  Chung H. Lam ,  Gerhard I. Meijer

IPC分类号： H01L23/62 ,  H01L21/8234

CPC分类号： H01L27/0629 ,  H01L27/101 ,  H01L27/24

摘要： Disclosed are a semiconductor structure and a method that allow for simultaneous voltage/current conditioning of multiple memory elements in a nonvolatile memory device with multiple memory cells. The structure and method incorporate the use of a resistor connected in series with the memory elements to limit current passing through the memory elements. Specifically, the method and structure incorporate a blanket temporary series resistor on the wafer surface above the memory cells and/or permanent series resistors within the memory cells. During the conditioning process, these resistors protect the transition metal oxide in the individual memory elements from damage (i.e., burn-out), once it has been conditioned.

摘要翻译： 公开了一种半导体结构和方法，其允许在具有多个存储器单元的非易失性存储器件中同时对多个存储器元件进行电压/电流调节。 该结构和方法结合使用与存储器元件串联连接的电阻器来限制电流通过存储器元件。 具体地，该方法和结构在存储器单元上方的晶片表面上和/或存储器单元内的永久串联电阻器上并入一个橡皮布暂时串联电阻器。 在调节过程中，一旦调节了这些电阻，这些电阻就可以保护各个存储元件中的过渡金属氧化物免受损坏（即烧坏）。

公开(公告)号：US20060267086A1

公开(公告)日：2006-11-30

申请号：US11140780

申请日：2005-05-31

申请人： Toshijaru Furukawa ,  Mark Hakey ,  Steven Holmes ,  David Horak ,  Charles Koburger ,  Chung Lam ,  Gerhard Meijer

发明人： Toshijaru Furukawa ,  Mark Hakey ,  Steven Holmes ,  David Horak ,  Charles Koburger ,  Chung Lam ,  Gerhard Meijer

IPC分类号： H01L29/76

CPC分类号： H01L27/101 ,  H01L27/115 ,  H01L27/2409 ,  H01L27/2463 ,  H01L45/04 ,  H01L45/1233 ,  H01L45/147 ,  Y10S438/90

摘要： Disclosed are non-volatile memory devices that incorporate a series of single or double memory cells. The single memory cells are essentially “U” shaped. The double memory cells comprise two essentially “U” shaped memory cells. Each memory cell comprises a memory element having a bi-stable layer sandwiched between two conductive layers. A temporary conductor may be applied to a series of cells and used to bulk condition the bi-stable layers of the cells. Also, due to the “U” shape of the cells, a cross point wire array may be used to connect a series of cells. The cross point wire array allows the memory elements of each cell to be individually identified and addressed for storing information and also allows for the information stored in the memory elements in all of the cells in the series to be simultaneously erased using a block erase process.

公开(公告)号：US07834384B2

公开(公告)日：2010-11-16

申请号：US12060922

申请日：2008-04-02

申请人： Toshijaru Furukawa ,  Mark C. Hakey ,  Steven J. Holmes ,  David V. Horak ,  Charles W. Koburger, III ,  Chung H. Lam ,  Gerhard I. Meijer

发明人： Toshijaru Furukawa ,  Mark C. Hakey ,  Steven J. Holmes ,  David V. Horak ,  Charles W. Koburger, III ,  Chung H. Lam ,  Gerhard I. Meijer

IPC分类号： H01L27/00

CPC分类号： H01L27/0629 ,  H01L27/101 ,  H01L27/24

摘要： Disclosed are a semiconductor structure and a method that allow for simultaneous voltage/current conditioning of multiple memory elements in a nonvolatile memory device with multiple memory cells. The structure and method incorporate the use of a resistor connected in series with the memory elements to limit current passing through the memory elements. Specifically, the method and structure incorporate a blanket temporary series resistor on the wafer surface above the memory cells and/or permanent series resistors within the memory cells. During the conditioning process, these resistors protect the transition metal oxide in the individual memory elements from damage (i.e., burn-out), once it has been conditioned.

摘要翻译： 公开了一种半导体结构和方法，其允许在具有多个存储器单元的非易失性存储器件中同时对多个存储器元件进行电压/电流调节。 该结构和方法结合使用与存储器元件串联连接的电阻器来限制电流通过存储器元件。 具体地，该方法和结构在存储器单元上方的晶片表面上和/或存储器单元内的永久串联电阻器上并入一个橡皮布暂时串联电阻器。 在调节过程中，一旦调节了这些电阻，这些电阻就可以保护各个存储元件中的过渡金属氧化物免受损坏（即烧坏）。

公开(公告)号：US07256415B2

公开(公告)日：2007-08-14

申请号：US11140780

申请日：2005-05-31

申请人： Toshijaru Furukawa ,  Mark C. Hakey ,  Steven J. Holmes ,  David V. Horak ,  Charles W. Koburger, III ,  Chung H. Lam ,  Gerhard I. Meijer

发明人： Toshijaru Furukawa ,  Mark C. Hakey ,  Steven J. Holmes ,  David V. Horak ,  Charles W. Koburger, III ,  Chung H. Lam ,  Gerhard I. Meijer

IPC分类号： H01L47/00

CPC分类号： H01L27/101 ,  H01L27/115 ,  H01L27/2409 ,  H01L27/2463 ,  H01L45/04 ,  H01L45/1233 ,  H01L45/147 ,  Y10S438/90

摘要： Disclosed are non-volatile memory devices that incorporate a series of single or double memory cells. The single memory cells are essentially “U” shaped. The double memory cells comprise two essentially “U” shaped memory cells. Each memory cell comprises a memory element having a bi-stable layer sandwiched between two conductive layers. A temporary conductor may be applied to a series of cells and used to bulk condition the bi-stable layers of the cells. Also, due to the “U” shape of the cells, a cross point wire array may be used to connect a series of cells. The cross point wire array allows the memory elements of each cell to be individually identified and addressed for storing information and also allows for the information stored in the memory elements in all of the cells in the series to be simultaneously erased using a block erase process.

摘要翻译： 公开了包含一系列单个或双重存储器单元的非易失性存储器件。 单个存储器单元基本上是“U”形的。 双重存储单元包括两个基本上“U”形的存储单元。 每个存储单元包括具有夹在两个导电层之间的双稳态层的存储元件。 临时导体可以应用于一系列的电池并且用于批量地调节电池的双稳态层。 此外，由于电池的“U”形状，可以使用交叉点线阵列来连接一系列电池。 交叉点线阵列允许每个单元的存储元件被单独识别和寻址用于存储信息，并且还允许使用块擦除处理同时擦除存储在串联中的所有单元中的存储器元件中的信息。

公开(公告)号：US20070235811A1

公开(公告)日：2007-10-11

申请号：US11400596

申请日：2006-04-07

申请人： Toshijaru Furukawa ,  Mark Hakey ,  Steven Holmes ,  David Horak ,  Charles Koburger ,  Chung Lam ,  Gerhard Meijer

发明人： Toshijaru Furukawa ,  Mark Hakey ,  Steven Holmes ,  David Horak ,  Charles Koburger ,  Chung Lam ,  Gerhard Meijer

IPC分类号： H01L21/336

CPC分类号： H01L27/0629 ,  H01L27/101 ,  H01L27/24

摘要： Disclosed are a semiconductor structure and a method that allow for simultaneous voltage/current conditioning of multiple memory elements in a nonvolatile memory device with multiple memory cells. The structure and method incorporate the use of a resistor connected in series with the memory elements to limit current passing through the memory elements. Specifically, the method and structure incorporate a blanket temporary series resistor on the wafer surface above the memory cells and/or permanent series resistors within the memory cells. During the conditioning process, these resistors protect the transition metal oxide in the individual memory elements from damage (i.e., burn-out), once it has been conditioned.

摘要翻译： 公开了一种半导体结构和方法，其允许在具有多个存储器单元的非易失性存储器件中同时对多个存储器元件进行电压/电流调节。 该结构和方法结合使用与存储器元件串联连接的电阻器来限制电流通过存储器元件。 具体地，该方法和结构在存储器单元上方的晶片表面上和/或存储器单元内的永久串联电阻器上并入一个橡皮布暂时串联电阻器。 在调节过程中，一旦调节了这些电阻，这些电阻就可以保护各个存储元件中的过渡金属氧化物免受损坏（即烧坏）。

公开(公告)号：US20070212810A1

公开(公告)日：2007-09-13

申请号：US11748579

申请日：2007-05-15

申请人： Toshijaru Furukawa ,  Mark Hakey ,  Steven Holmes ,  David Horak ,  Charles Koburger ,  Chung Lam ,  Gerhard Meijer

发明人： Toshijaru Furukawa ,  Mark Hakey ,  Steven Holmes ,  David Horak ,  Charles Koburger ,  Chung Lam ,  Gerhard Meijer

IPC分类号： H01L21/00

CPC分类号： H01L27/101 ,  H01L27/115 ,  H01L27/2409 ,  H01L27/2463 ,  H01L45/04 ,  H01L45/1233 ,  H01L45/147 ,  Y10S438/90

摘要： Disclosed are non-volatile memory devices that incorporate a series of single or double memory cells. The single memory cells are essentially “U” shaped. The double memory cells comprise two essentially “U” shaped memory cells. Each memory cell comprises a memory element having a bi-stable layer sandwiched between two conductive layers. A temporary conductor may be applied to a series of cells and used to bulk condition the bi-stable layers of the cells. Also, due to the “U” shape of the cells, a cross point wire array may be used to connect a series of cells. The cross point wire array allows the memory elements of each cell to be individually identified and addressed for storing information and also allows for the information stored in the memory elements in all of the cells in the series to be simultaneously erased using a block erase process.

摘要翻译： 公开了包含一系列单个或双重存储器单元的非易失性存储器件。 单个存储器单元基本上是“U”形的。 双重存储单元包括两个基本上“U”形的存储单元。 每个存储单元包括具有夹在两个导电层之间的双稳态层的存储元件。 临时导体可以应用于一系列的电池并且用于批量地调节电池的双稳态层。 此外，由于电池的“U”形状，可以使用交叉点线阵列来连接一系列电池。 交叉点线阵列允许每个单元的存储元件被单独识别和寻址用于存储信息，并且还允许使用块擦除处理同时擦除存储在串联中的所有单元中的存储器元件中的信息。