- 专利标题: Method of fabricating semiconductor device
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申请号: US11889099申请日: 2007-08-09
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公开(公告)号: US20070290268A1公开(公告)日: 2007-12-20
- 发明人: Sumito Numazawa , Yoshito Nakazawa , Masayoshi Kobayashi , Satoshi Kudo , Yasuo Imai , Sakae Kubo , Takashi Shigematsu , Akihiro Ohnishi , Kozo Uesawa , Kentaro Oishi
- 申请人: Sumito Numazawa , Yoshito Nakazawa , Masayoshi Kobayashi , Satoshi Kudo , Yasuo Imai , Sakae Kubo , Takashi Shigematsu , Akihiro Ohnishi , Kozo Uesawa , Kentaro Oishi
- 优先权: JP09-232425 19970828
- 主分类号: H01L29/76
- IPC分类号: H01L29/76
摘要:
In a method of fabricating a semiconductor device having a MISFET of trench gate structure, a trench is formed from a major surface of a semiconductor layer of first conductivity type which serves as a drain region, in a depth direction of the semiconductor layer, a gate insulating film including a thermal oxide film and a deposited film is formed over the internal surface of the trench, and after a gate electrode has been formed in the trench, impurities are introduced into the semiconductor substrate of first conductivity type to form a semiconductor region of second conductivity type which serves as a channel forming region, and impurities are introduced into the semiconductor region of second conductivity type to form the semiconductor region of first conductivity type which serves as a source region.
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