Invention Application
- Patent Title: Method of fabrication of a semiconductor chip package
- Patent Title (中): 制造半导体芯片封装的方法
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Application No.: US11826468Application Date: 2007-07-16
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Publication No.: US20080014680A1Publication Date: 2008-01-17
- Inventor: Akira Tokumitsu , Fumihiko Ooka
- Applicant: Akira Tokumitsu , Fumihiko Ooka
- Applicant Address: JP Tokyo 105-8460
- Assignee: OKI ELECTRIC INDUSTRY CO., LTD.
- Current Assignee: OKI ELECTRIC INDUSTRY CO., LTD.
- Current Assignee Address: JP Tokyo 105-8460
- Priority: JPJP2005-195833 20050705
- Main IPC: H01L21/58
- IPC: H01L21/58

Abstract:
A semiconductor chip package includes a first semiconductor chip, that is an MEMS chip having a movable structure. The movable structure has a movable section. The first semiconductor chip includes a plurality of first electrode pads, and a first sealing section. The first sealing section is a closed loop formed on the top face of the frame section surrounding the movable structure. The first semiconductor chip also includes a thin plate member for sealing the movable structure. The semiconductor chip package also includes a second semiconductor chip. The second semiconductor chip has a plurality of second electrode pads. The semiconductor chip package also includes a substrate. The substrate has third electrode pads. The first and second semiconductor chips are mounted on the substrate. First bonding wires connect the first electrode pads to the second electrode pads. Second bonding wires connect the second electrode pads to the third electrode pads.
Public/Granted literature
- US07410829B2 Method of fabricating a semiconductor chip package Public/Granted day:2008-08-12
Information query
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