In a semiconductor memory which comprises a main memory array, redundant memory cells, and a plurality of repair fuse boxes, a method of selecting redundant memory cells in relation to repair fuse boxes, comprising testing redundant memory cells to determine whether they are valid or defective, and making a selection of redundant memory cells which allocates valid redundant memory cells to respective repair fuse boxes but which does not allocate defective redundant memory cells to any repair fuse boxes.