发明申请
- 专利标题: Stackable semiconductor device and fabrication method thereof
- 专利标题(中): 可堆叠半导体器件及其制造方法
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申请号: US12077223申请日: 2008-03-18
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公开(公告)号: US20080230913A1公开(公告)日: 2008-09-25
- 发明人: Chien-Ping Huang , Chin-Huang Chang , Chih-Ming Huang , Chun-Chi Ke
- 申请人: Chien-Ping Huang , Chin-Huang Chang , Chih-Ming Huang , Chun-Chi Ke
- 申请人地址: TW Taichung
- 专利权人: Siliconware Precision Industries Co., Ltd.
- 当前专利权人: Siliconware Precision Industries Co., Ltd.
- 当前专利权人地址: TW Taichung
- 优先权: TW096109442 20070320
- 主分类号: H01L23/488
- IPC分类号: H01L23/488 ; H01L21/304
摘要:
The invention provides a stackable semiconductor device and a fabrication method thereof, including providing a wafer having a plurality of dies mounted thereon, both the die and the wafer having an active surface and a non-active surface opposing one another respectively, wherein each die has a plurality of solder pads formed on the active surface thereof and a groove formed between adjacent solder pads to form a first metal layer therein that is electrically connected to the solder pads; subsequently thinning the non-active surface of the wafer to where the grooves are located to expose the first metal layer therefrom, and forming a second metal layer on the non-active surface of the wafer for electrically connecting with the first metal layer; and separating the dies to form a plurality of stackable semiconductor devices. Thereby, the first and second metal layers formed on the active surface and the non-active surface of the semiconductor device can be stacked and connected to constitute a multi-die stack structure, thereby increasing integration without increasing the area of the stacked dies. Further, the problems known in the prior art of poor electrical connection, complicated manufacturing process and increased cost as a result of using wire bonding and TSV can be avoided.
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