发明申请
US20080263417A1 Efficient Memory Product for Test and Soft Repair of SRAM with Redundancy 失效
高效的内存产品用于冗余的SRAM的测试和软修复

Efficient Memory Product for Test and Soft Repair of SRAM with Redundancy
摘要:
Memory array built in self testing utilizing including a simple data history table. The table is used to track failing locations observed during any level of assembly test of processor or logic semiconductor chips where the chips contain SRAM macros with redundant elements for failure relief.
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