发明申请
US20080281572A1 INTEGRATED CIRCUIT (IC) DESIGN METHOD AND METHOD OF ANALYZING RADIATION-INDUCED SINGLE-EVENT UPSETS IN CMOS LOGIC DESIGNS
审中-公开
集成电路（IC）设计方法和分析CMOS逻辑设计中辐射诱导的单事件的方法
- 专利标题： INTEGRATED CIRCUIT (IC) DESIGN METHOD AND METHOD OF ANALYZING RADIATION-INDUCED SINGLE-EVENT UPSETS IN CMOS LOGIC DESIGNS
- 专利标题（中）： 集成电路（IC）设计方法和分析CMOS逻辑设计中辐射诱导的单事件的方法
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申请号： US11746709申请日： 2007-05-10
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公开(公告)号： US20080281572A1公开(公告)日： 2008-11-13
- 发明人: Ruchir Puri , Henry H. K. Tang , Kim Yaw Tong
- 申请人： Ruchir Puri , Henry H. K. Tang , Kim Yaw Tong
- 主分类号： G06F17/50
- IPC分类号： G06F17/50
摘要：
A logic design tool, a tool for analyzing soft error sensitivities in logic, and a program product for logic design. A particle generator simulates events likely to occur for a given operating environment. A pre-characterizer provides circuit block responses to simulated events. A circuit response simulator simulates events in a logic design and provides an indication of soft error sensitivity for the design. Based on the soft error sensitivity indication, the design may be modified to reduce the overall soft error sensitivity.
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