The formation of electronic assemblies, including assemblies having an interposer, are described. In one embodiment, a method includes forming a plurality of vias extending partially through a body, the vias including sidewalls defined by the body. An insulating layer is formed on the sidewalls and on an upper surface of the body. An electrically conductive layer is formed on the insulating layer in the vias and on the upper surface of the body, the electrically conductive layer defining a first metal pad layer on the upper surface and a second metal pad layer in contact with the first metal pad layer, the second metal pad layer having a denser pitch between adjacent pads than the first metal pad layer. The method also includes forming a dielectric layer between the adjacent metal pads in the first and second pad layers. The method also includes coupling a plurality of elements to the second metal pad layer. After the coupling the elements, the method includes thinning the body through a lower surface and exposing the electrically insulating layer in the vias. The method also includes removing a portion of the electrically insulating layer in the vias, and coupling the electrically conductive layer to a substrate, wherein the body is positioned between the elements and the substrate. Other embodiments are described and claimed.