发明申请
- 专利标题： Method and System for Placement of Electric Circuit Components in Integrated Circuit Design
- 专利标题（中）： 集成电路设计中电路元件放置方法与系统
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申请号： US12121397申请日： 2008-05-15
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公开(公告)号： US20080301612A1公开(公告)日： 2008-12-04
- 发明人: Markus Buehler , Juergen Koehl
- 申请人： Markus Buehler , Juergen Koehl
- 申请人地址： US NY Armonk
- 专利权人： INTERNATIONAL BUSINESS MACHINES CORPORATION
- 当前专利权人： INTERNATIONAL BUSINESS MACHINES CORPORATION
- 当前专利权人地址： US NY Armonk
- 优先权： EP07109419.7 20070601
- 主分类号： G06F17/50
- IPC分类号： G06F17/50
摘要：
The invention relates to a method and a system for placing electric circuits in integrated circuit chip design. Specifically, the invention encompasses performing a global placement step (112) placing the cells (11) into bins (12, 14, 16A, 16B) on the chip (10), as well as a detailed placement process (116) which arranges the cells in the bins (12, 14, 16A, 16B) to obtain a legal arrangement while generating simply connected free space (21, 21A, 21B) for routing channels (18′, 26).
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