发明申请
US20080307244A1 Method of and Apparatus for Reducing Power Consumption within an Integrated Circuit 有权
降低集成电路内功耗的方法和装置

Method of and Apparatus for Reducing Power Consumption within an Integrated Circuit
摘要:
An integrated circuit comprising a plurality of processing cores, characterised by comprising electrically controllable switches for controlling the supply of power to one or more of the processing cores, a memory for saving state data from at least one of the processing cores and a controller adapted to control the supply of power to one or more of the processing cores such that processing cores can be de-powered.
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