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    Shared resource arbitration
    1.
    发明授权
    Shared resource arbitration 有权
    共享资源仲裁

    公开(公告)号：US08032678B2

    公开(公告)日：2011-10-04

    申请号：US12265250

    申请日：2008-11-05

    申请人： Jean-Louis Tardieux ,  Joern Soerensen

    发明人： Jean-Louis Tardieux ,  Joern Soerensen

    IPC分类号： G06F13/36

    CPC分类号： G06F13/362

    摘要： Masters request access to a shared resource, such as a shared bus. Usage of the shared bus by each of the masters is monitored, a request to use the shared bus by one of the masters is received, and usage of the shared bus by the master is compared with a corresponding bandwidth threshold. The request is arbitrated if the usage of the shared bus by the master is below the bandwidth threshold, and the request to use the shared bus is granted to the master based on the arbitration.

    摘要翻译： 主人请求访问共享资源，例如共享总线。 监视每个主机对共享总线的使用情况，接收主机之一使用共享总线的请求，将主机的共享总线的使用与对应的带宽阈值进行比较。 如果主机的共享总线的使用低于带宽阈值，则请求被仲裁，并且基于仲裁向主机授予使用共享总线的请求。

    Shared Resource Arbitration
    2.
    发明申请
    Shared Resource Arbitration 有权
    共享资源仲裁

    公开(公告)号：US20100115167A1

    公开(公告)日：2010-05-06

    申请号：US12265250

    申请日：2008-11-05

    申请人： Jean-Louis Tardieux ,  Joern Soerensen

    发明人： Jean-Louis Tardieux ,  Joern Soerensen

    IPC分类号： G06F13/36

    CPC分类号： G06F13/362

    摘要： Masters request access to a shared resource, such as a shared bus. Usage of the shared bus by each of the masters is monitored, a request to use the shared bus by one of the masters is received, and usage of the shared bus by the master is compared with a corresponding bandwidth threshold. The request is arbitrated if the usage of the shared bus by the master is below the bandwidth threshold, and the request to use the shared bus is granted to the master based on the arbitration.

    摘要翻译： 主人请求访问共享资源，例如共享总线。 监视每个主机对共享总线的使用情况，接收主机之一使用共享总线的请求，将主机的共享总线的使用与对应的带宽阈值进行比较。 如果主机的共享总线的使用低于带宽阈值，则请求被仲裁，并且基于仲裁向主机授予使用共享总线的请求。

    SHARED MEMORY HAVING MULTIPLE ACCESS CONFIGURATIONS
    4.
    发明申请
    SHARED MEMORY HAVING MULTIPLE ACCESS CONFIGURATIONS 有权
    具有多个访问配置的共享记忆

    公开(公告)号：US20100325368A1

    公开(公告)日：2010-12-23

    申请号：US12486308

    申请日：2009-06-17

    申请人： Kari Ann O'Brien ,  George Lattimore ,  Joern Soerensen ,  Mathew B. Rutledge ,  Paul William Hollis

    发明人： Kari Ann O'Brien ,  George Lattimore ,  Joern Soerensen ,  Mathew B. Rutledge ,  Paul William Hollis

    IPC分类号： G06F12/00 ,  G06F12/02

    CPC分类号： G06F13/1652

    摘要： An apparatus includes a first processor that accesses memory according to a first clock frequency, a second processor that accesses memory according to a second clock frequency, and a memory device is configurable to selectively operate according to the first clock frequency or the second clock frequency. A memory controller enables dynamic configuration of organization of the memory device to allow a first portion of the memory device to be accessed by the first processor according to the first clock frequency and a second portion of the memory device to be accessed by the second processor according to the second clock frequency.

    摘要翻译： 一种装置包括根据第一时钟频率访问存储器的第一处理器，根据第二时钟频率访问存储器的第二处理器，以及存储器件可配置为根据第一时钟频率或第二时钟频率选择性地操作。 存储器控制器实现对存储器设备的组织的动态配置，以允许第一处理器根据第一时钟频率访问存储器件的第一部分，并且由第二处理器访问存储器件的第二部分， 到第二个时钟频率。

    Method of and apparatus for reducing power consumption in a mobile telephony system
    5.
    发明申请
    Method of and apparatus for reducing power consumption in a mobile telephony system 有权
    用于降低移动电话系统中的功耗的方法和装置

    公开(公告)号：US20080311947A1

    公开(公告)日：2008-12-18

    申请号：US11818226

    申请日：2007-06-13

    申请人： Joern Soerensen ,  Carsten Griem ,  Carsten Pedersen

    发明人： Joern Soerensen ,  Carsten Griem ,  Carsten Pedersen

    IPC分类号： H04Q7/20

    CPC分类号： H04W52/0229 ,  H04L1/0053 ,  H04L1/0059 ,  Y02D70/1222

    摘要： A method of decoding data comprising a plurality of data-bursts, comprising the steps of: i) receiving a first one of the data-bursts, ii) associating hypothesis data with the or each received data-bursts; iii) attempting to decode the data; and iv) if the decode is successful to power down the receiver, and if the decode is unsuccessful receiving a further one of the data-bursts and repeating steps ii) to iv), until all of the data has been received.

    摘要翻译： 一种对包括多个数据突发的数据进行解码的方法，包括以下步骤：i）接收数据突发中的第一个，ii）将假设数据与所接收或接收的数据突发相关联; iii）尝试解码数据; 以及iv）如果解码成功地关闭接收机，并且如果解码不成功接收数据突发中的另一个，并重复步骤ii）至iv），直到所有数据已被接收。

    Clock enable system
    6.
    发明授权
    Clock enable system 有权
    时钟使能系统

    公开(公告)号：US06950672B2

    公开(公告)日：2005-09-27

    申请号：US10159177

    申请日：2002-05-30

    申请人： Jeffrey C. Gealow ,  Thomas J. Barber, Jr. ,  Palle Birk ,  Joern Soerensen

    发明人： Jeffrey C. Gealow ,  Thomas J. Barber, Jr. ,  Palle Birk ,  Joern Soerensen

    IPC分类号： G06F1/32 ,  H04B1/18 ,  H04B1/38

    CPC分类号： G06F1/3237 ,  G06F1/3215 ,  H04W52/0293 ,  Y02D10/128 ,  Y02D70/1222

    摘要： A clock enable system for a multichip device includes a first integrated circuit including a clock signal and at least a second integrated circuit including at least one functional block periodically requiring clock signals from the first integrated circuit; a clock required circuit responsive to each functional block for providing a clock required signal in response to activation of any one or more of the functional blocks; and a clock enable circuit responsive to the clock required signal for enabling the first integrated circuit to provide clock signals to the functional blocks on the second integrated circuit.

    摘要翻译： 用于多芯片器件的时钟使能系统包括包括时钟信号的第一集成电路和至少包括至少一个功能块的第二集成电路，周期性地要求来自第一集成电路的时钟信号; 响应于每个功能块的响应于任何一个或多个功能块的激活而提供时钟所需信号的时钟需要电路; 以及响应于时钟所需信号的时钟使能电路，用于使第一集成电路能够向第二集成电路上的功能块提供时钟信号。