发明申请
- 专利标题: Phase Locked Loop with Stabilized Dynamic Response
- 专利标题(中): 具有稳定动态响应的锁相环
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申请号: US11770867申请日: 2007-06-29
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公开(公告)号: US20090002038A1公开(公告)日: 2009-01-01
- 发明人: David W. Boerstler , Eskinder Hailu , Jieming Qi
- 申请人: David W. Boerstler , Eskinder Hailu , Jieming Qi
- 主分类号: H03L7/085
- IPC分类号: H03L7/085 ; H03L7/08
摘要:
A hybrid phase locked loop (PLL) circuit for obtaining stabilized dynamic response and independent adjustment of damping factor and loop bandwidth is provided. The hybrid PLL circuit of the illustrative embodiments includes the resistance/capacitance (RC) filter elements of a conventional RC PLL and the feed-forward path from the output of the phase frequency detector to the voltage controlled oscillator (VCO). The hybrid PLL essentially enhances the performance of the conventional feed-forward PLL by providing the RC filter whose components can be weighted to provide a dynamic response that is significantly less sensitive to parameter variation and which allows loop bandwidth optimization without sacrificing damping.