Invention Application
- Patent Title: Fabricating method for multilayer printed circuit board
- Patent Title (中): 多层印刷电路板的制造方法
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Application No.: US12076431Application Date: 2008-03-18
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Publication No.: US20090014411A1Publication Date: 2009-01-15
- Inventor: Ryoichi Watanabe
- Applicant: Ryoichi Watanabe
- Applicant Address: KR Suwon
- Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
- Current Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
- Current Assignee Address: KR Suwon
- Priority: KR10-2007-0069275 20070710
- Main IPC: B05D5/12
- IPC: B05D5/12 ; H01B13/00

Abstract:
A fabrication method for a multilayer printed circuit board includes: forming a first circuit-forming pattern and a first insulation layer, into which the first circuit-forming pattern is inserted, on a first carrier; forming inner circuit patterns and inner insulation layers over the first insulation layer, and forming inner vias connecting the inner circuit patterns positioned on different insulation layers; forming a second circuit-forming pattern on a second carrier and inserting the second circuit-forming pattern into a second insulation layer on an outermost side; removing the first carrier and the second carrier; forming circuit-forming grooves by removing the first circuit-forming pattern and the second circuit-forming pattern, and forming via-forming indentations connected with the circuit-forming grooves; and forming outer circuit patterns and outer vias by filling the circuit-forming grooves and the via-forming indentations with a conductive material. This can provide a thin printed circuit board having high reliability and fine-lined circuits.
Public/Granted literature
- US08262917B2 Fabricating method for multilayer printed circuit board Public/Granted day:2012-09-11
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