发明申请
- 专利标题: Flip chip interconnection
- 专利标题(中): 倒装芯片互连
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申请号: US11435305申请日: 2006-05-15
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公开(公告)号: US20090045507A1公开(公告)日: 2009-02-19
- 发明人: Rajendra D. Pendse , Marcos Karnezos , Kyung-Moon Kim , Koo Hong Lee , Moon Hee Lee , Orion Starr
- 申请人: Rajendra D. Pendse , Marcos Karnezos , Kyung-Moon Kim , Koo Hong Lee , Moon Hee Lee , Orion Starr
- 申请人地址: SG Singapore
- 专利权人: STATS ChipPAC Ltd.
- 当前专利权人: STATS ChipPAC Ltd.
- 当前专利权人地址: SG Singapore
- 主分类号: H01L23/48
- IPC分类号: H01L23/48 ; H01L21/00
摘要:
Methods for forming flip chip interconnection, in which the bump interconnect is defined at least in part by an underfill. The underfill includes a material that is thermally cured; that is, raising the temperature of the underfill material can result in progressive curing of the underfill through stages including a gel stage and a fully cured stage. According to the invention, during at least an early stage in the process the semiconductor chip is carried by a thermode, which is employed to control the temperature of the assembly in a specified way. Also, flip chip interconnections and flip chip packages made according to the methods of invention.
公开/授权文献
- US07736950B2 Flip chip interconnection 公开/授权日:2010-06-15