A design structure embodied in a machine readable medium, the design structure including a current mirror including N stages, each stage comprising 2n-1 dual gate transistors where N is a positive integer equal to or greater than one and n is an integer between 0 and N−1 for each of the N-stages, values of n being different for each stage of the N stages; an output, every dual gate transistor of each stage of the N stages connected to the output; N inputs, every input of the N inputs connected to a different stage of the N stages, any particular input of the N inputs connected to every dual gate transistor of a stage to which the particular input is connected to; and a current reference circuit, comprising a reference current source and a reference dual gate transistor, each stage of the N stages connected to the current reference circuit.