Design structure for a digital-to-analog converter using dual-gate transistors
    1.
    发明授权
    Design structure for a digital-to-analog converter using dual-gate transistors 失效
    使用双栅极晶体管的数模转换器的设计结构

    公开(公告)号:US07545298B2

    公开(公告)日:2009-06-09

    申请号:US12045055

    申请日:2008-03-10

    IPC分类号: H03M1/00

    摘要: A design structure embodied in a machine readable medium, the design structure including a current mirror including N stages, each stage comprising 2n−1 dual gate transistors where N is a positive integer equal to or greater than one and n is an integer between 0 and N−1 for each of the N-stages, values of n being different for each stage of the N stages; an output, every dual gate transistor of each stage of the N stages connected to the output; N inputs, every input of the N inputs connected to a different stage of the N stages, any particular input of the N inputs connected to every dual gate transistor of a stage to which the particular input is connected to; and a current reference circuit, comprising a reference current source and a reference dual gate transistor, each stage of the N stages connected to the current reference circuit.

    摘要翻译: 体现在机器可读介质中的设计结构,该设计结构包括包括N级的电流镜,每级包括2n-1个双栅极晶体管,其中N是等于或大于1的正整数,n是0和 N-1,对于N级的每个阶段,n的值不同; 一个输出,N级每级的每个双栅极晶体管连接到输出端; N个输入,N个输入的每个输入连接到N级的不同级,N个输入的任何特定输入连接到特定输入连接到的级的每个双栅极晶体管; 以及电流参考电路,包括参考电流源和参考双栅极晶体管,N级的每一级连接到电流参考电路。

    Method and apparatus for interfacing integrated circuits having
different supply voltages
    2.
    发明授权
    Method and apparatus for interfacing integrated circuits having different supply voltages 失效
    用于连接具有不同电源电压的集成电路的方法和装置

    公开(公告)号:US5859461A

    公开(公告)日:1999-01-12

    申请号:US829708

    申请日:1997-03-28

    IPC分类号: H03K19/0175 H01L29/76

    CPC分类号: H03K19/017509

    摘要: An integrated circuit chip having circuitry to adjust its threshold voltage between a plurality of threshold voltages for interfacing to integrated circuit chips having different supply voltages. The integrated circuit chip also includes circuitry for communicating its threshold voltage level to a second integrated circuit such that the second integrated circuit may set its threshold voltage prior to receiving logic communications from the integrated circuit. The present invention also discloses an integrated circuit that detects the logic level of incoming logic communications and adjusts its threshold voltage accordingly.

    摘要翻译: 一种集成电路芯片,具有用于在多个阈值电压之间调整其阈值电压的电路,用于与具有不同电源电压的集成电路芯片接口。 集成电路芯片还包括用于将其阈值电压电平传送到第二集成电路的电路,使得第二集成电路可以在从集成电路接收逻辑通信之前设置其阈值电压。 本发明还公开了一种集成电路,其检测输入逻辑通信的逻辑电平并相应地调整其阈值电压。

    Digital-to-analog converter using dual-gate transistors
    4.
    发明授权
    Digital-to-analog converter using dual-gate transistors 失效
    使用双栅极晶体管的数模转换器

    公开(公告)号:US07545297B2

    公开(公告)日:2009-06-09

    申请号:US11846916

    申请日:2007-08-29

    IPC分类号: H03M1/00

    CPC分类号: H03M1/745 H01L29/7855

    摘要: A digital to analog converter. The digital to analog converter including a current mirror comprising N stages, each stage comprising 2n−1 dual gate transistors where N is a positive integer equal to or greater than one and n is an integer between 0 and N−1 for each of the N-stages, values of n being different for each stage of the N stages; an output, every dual gate transistor of each stage of the N stages connected to the output; N inputs, every input of the N inputs connected to a different stage of the N stages, any particular input of the N inputs connected to every dual gate transistor of a stage to which the particular input is connected to; and a current reference circuit, comprising a reference current source and a reference dual gate transistor, each stage of the N stages connected to the current reference circuit.

    摘要翻译: 数模转换器。 数模转换器包括电流镜,包括N级,每级包括2n-1个双栅极晶体管,其中N是等于或大于1的正整数,并且对于N中的每一个,n是0和N-1之间的整数 阶段,n阶段的每个阶段的值不同; 一个输出,N级每级的每个双栅极晶体管连接到输出端; N个输入,N个输入的每个输入连接到N级的不同级,N个输入的任何特定输入连接到特定输入连接到的级的每个双栅极晶体管; 以及电流参考电路,包括参考电流源和参考双栅极晶体管,N级的每一级连接到电流参考电路。

    Method for Implementing Phase Rotator Circuits and Phase Rotator Circuit With Embedded Polyphase Filter Network Stage
    5.
    发明申请
    Method for Implementing Phase Rotator Circuits and Phase Rotator Circuit With Embedded Polyphase Filter Network Stage 失效
    实现具有嵌入式多相滤波器网络阶段的相位旋转电路和相位旋转电路的方法

    公开(公告)号:US20080107212A1

    公开(公告)日:2008-05-08

    申请号:US11557695

    申请日:2006-11-08

    IPC分类号: H03D1/00

    CPC分类号: H03H11/02

    摘要: A method for implementing phase rotator circuits and phase rotator circuit of the invention includes a polyphase filter network to create a quadrature phase version of the input signal. The polyphase filter network is partitioned into a first part that is physically isolated from the phase rotator circuit and a second part that is embedded in the phase rotator circuit. The second part of the polyphase filter is coupled to the first part of the polyphase filter by a high-pass equalizing buffer stage. The second part of the polyphase filter is coupled to the phase rotator circuit by a bandlimiting buffer stage.

    摘要翻译: 用于实现本发明的相位旋转电路和相位旋转电路的方法包括多相滤波器网络,以产生输入信号的正交相位版本。 多相滤波器网络被划分为与相位旋转电路物理隔离的第一部分和嵌入在相位旋转电路中的第二部分。 多相滤波器的第二部分通过高通均衡缓冲级耦合到多相滤波器的第一部分。 多相滤波器的第二部分通过带限幅缓冲器级耦合到相位旋转器电路。

    DESIGN STRUCTURE FOR A DIGITAL-TO-ANALOG CONVERTER USING DUAL-GATE TRANSISTORS
    7.
    发明申请
    DESIGN STRUCTURE FOR A DIGITAL-TO-ANALOG CONVERTER USING DUAL-GATE TRANSISTORS 失效
    使用双门极晶体管的数字到模拟转换器的设计结构

    公开(公告)号:US20090058704A1

    公开(公告)日:2009-03-05

    申请号:US12045055

    申请日:2008-03-10

    IPC分类号: H03M1/66

    摘要: A design structure embodied in a machine readable medium, the design structure including a current mirror including N stages, each stage comprising 2n-1 dual gate transistors where N is a positive integer equal to or greater than one and n is an integer between 0 and N−1 for each of the N-stages, values of n being different for each stage of the N stages; an output, every dual gate transistor of each stage of the N stages connected to the output; N inputs, every input of the N inputs connected to a different stage of the N stages, any particular input of the N inputs connected to every dual gate transistor of a stage to which the particular input is connected to; and a current reference circuit, comprising a reference current source and a reference dual gate transistor, each stage of the N stages connected to the current reference circuit.

    摘要翻译: 体现在机器可读介质中的设计结构,该设计结构包括包括N级的电流镜,每级包括2n-1个双栅极晶体管,其中N是等于或大于1的正整数,n是0和 N-1,对于N级的每个阶段,n的值不同; 一个输出,N级每级的每个双栅极晶体管连接到输出端; N个输入,N个输入的每个输入连接到N级的不同级,N个输入的任何特定输入连接到特定输入连接到的级的每个双栅极晶体管; 以及电流参考电路,包括参考电流源和参考双栅极晶体管,N级的每一级连接到电流参考电路。