发明申请
- 专利标题: NONPLANAR SEMICONDUCTOR DEVICE WITH PARTIALLY OR FULLY WRAPPED AROUND GATE ELECTRODE AND METHODS OF FABRICATION
- 专利标题(中): 非门式半导体器件,部分或完全包裹在门电极和制造方法
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申请号: US12259464申请日: 2008-10-28
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公开(公告)号: US20090061572A1公开(公告)日: 2009-03-05
- 发明人: Scott A. Hareland , Robert S. Chau , Brian S. Doyle , Rafael Rios , Tom Linton , Suman Datta
- 申请人: Scott A. Hareland , Robert S. Chau , Brian S. Doyle , Rafael Rios , Tom Linton , Suman Datta
- 申请人地址: US CA Santa Clara
- 专利权人: Intel Corporation
- 当前专利权人: Intel Corporation
- 当前专利权人地址: US CA Santa Clara
- 主分类号: H01L21/336
- IPC分类号: H01L21/336
摘要:
A nonplanar semiconductor device and its method of fabrication is described. The nonplanar semiconductor device includes a semiconductor body having a top surface opposite a bottom surface formed above an insulating substrate wherein the semiconductor body has a pair laterally opposite sidewalls. A gate dielectric is formed on the top surface of the semiconductor body on the laterally opposite sidewalls of the semiconductor body and on at least a portion of the bottom surface of semiconductor body. A gate electrode is formed on the gate dielectric, on the top surface of the semiconductor body and adjacent to the gate dielectric on the laterally opposite sidewalls of semiconductor body and beneath the gate dielectric on the bottom surface of the semiconductor body. A pair source/drain regions are formed in the semiconductor body on opposite sides of the gate electrode.
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