A method forms a split gate memory cell by providing a semiconductor substrate and forming an overlying select gate. The select gate has a predetermined height and is electrically insulated from the semiconductor substrate. A charge storing layer is subsequently formed overlying and adjacent to the select gate. A control gate is subsequently formed adjacent to and separated from the select gate by the charge storing layer. The charge storing layer is also positioned between the control gate and the semiconductor substrate. The control gate initially has a height greater than the predetermined height of the select gate. The control gate is recessed to a control gate height that is less than the predetermined height of the select gate. A source and a drain are formed in the semiconductor substrate.