Invention Application
US20090113363A1 METHOD AND SYSTEM FOR CREATING A BOOLEAN MODEL OF MULTI-PATH AND MULTI-STRENGTH SIGNALS FOR VERIFICATION
有权
用于创建用于验证的多路径和多强度信号的布尔模型的方法和系统
- Patent Title: METHOD AND SYSTEM FOR CREATING A BOOLEAN MODEL OF MULTI-PATH AND MULTI-STRENGTH SIGNALS FOR VERIFICATION
- Patent Title (中): 用于创建用于验证的多路径和多强度信号的布尔模型的方法和系统
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Application No.: US12260353Application Date: 2008-10-29
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Publication No.: US20090113363A1Publication Date: 2009-04-30
- Inventor: Kei-Yong KHOO , Mitchell HINES , Chi-Chang Lin
- Applicant: Kei-Yong KHOO , Mitchell HINES , Chi-Chang Lin
- Applicant Address: US CA San Jose
- Assignee: CADENCE DESIGN SYSTEMS, INC.
- Current Assignee: CADENCE DESIGN SYSTEMS, INC.
- Current Assignee Address: US CA San Jose
- Main IPC: G06F17/50
- IPC: G06F17/50
Abstract:
A system, method, computer program product for verification and equivalence checking. In one approach, the system, method, and computer program product analyzes the switching paths in a manner consistent with circuit functionality to provide a complete application which can verify the complex characteristics in the circuits to the accurate RTL model function, including FPGA, ROM Arrays, RAM circuits, and other custom integrated circuit designs.
Public/Granted literature
- US08132135B2 Method and system for creating a boolean model of multi-path and multi-strength signals for verification Public/Granted day:2012-03-06
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