发明申请
- 专利标题: SEMICONDUCTOR PACKAGES AND METHODS OF MANUFACTURING THE SAME
- 专利标题(中): 半导体封装及其制造方法
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申请号: US12353501申请日: 2009-01-14
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公开(公告)号: US20090184411A1公开(公告)日: 2009-07-23
- 发明人: Hyun-Soo CHUNG , Jae-Shin Cho , Dong-Ho Lee , Dong-Hyeon Jang , Seong-Deok Hwang , Seung-Duk Baek
- 申请人: Hyun-Soo CHUNG , Jae-Shin Cho , Dong-Ho Lee , Dong-Hyeon Jang , Seong-Deok Hwang , Seung-Duk Baek
- 申请人地址: KR Suwon-si
- 专利权人: Samsung Electronics Co., Ltd
- 当前专利权人: Samsung Electronics Co., Ltd
- 当前专利权人地址: KR Suwon-si
- 优先权: KR2008-6703 20080122
- 主分类号: H01L23/48
- IPC分类号: H01L23/48
摘要:
Provided are semiconductor packages and methods of manufacturing the semiconductor package. The semiconductor packages may include a substrate including a chip pad, a redistributed line which is electrically connected to the chip pad and includes an opening. The semiconductor packages may also include an external terminal connection portion, and an external terminal connection pad which is disposed at an opening and electrically connected to the redistributed line. The present general inventive concept can solve the problem where an ingredient of gold included in a redistributed line may be prevented from being diffused into an adjacent bump pad to form a void or an undesired intermetallic compound. In a chip on chip structure, a plurality of bumps of a lower chip are connected to an upper chip to improve reliability, diversity and functionality of the chip on chip structure.
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