Invention Application
US20090184414A1 WAFER LEVEL CHIP SCALE PACKAGE HAVING AN ENHANCED HEAT EXCHANGE EFFICIENCY WITH AN EMF SHIELD AND A METHOD FOR FABRICATING THE SAME
审中-公开
具有电磁屏蔽效果的增强热交换效率的WAFER LEVEL CHIP SCALE包装及其制造方法
- Patent Title: WAFER LEVEL CHIP SCALE PACKAGE HAVING AN ENHANCED HEAT EXCHANGE EFFICIENCY WITH AN EMF SHIELD AND A METHOD FOR FABRICATING THE SAME
- Patent Title (中): 具有电磁屏蔽效果的增强热交换效率的WAFER LEVEL CHIP SCALE包装及其制造方法
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Application No.: US12347020Application Date: 2008-12-31
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Publication No.: US20090184414A1Publication Date: 2009-07-23
- Inventor: Chang Jun PARK , Kwon Whan HAN , Seong Cheol KIM , Sung Min KIM , Hyeong Seok CHOI , Ha Na LEE , Tac Keun OH , Sang Joon LIM
- Applicant: Chang Jun PARK , Kwon Whan HAN , Seong Cheol KIM , Sung Min KIM , Hyeong Seok CHOI , Ha Na LEE , Tac Keun OH , Sang Joon LIM
- Priority: KR10-2008-0006605 20080122; KR10-2008-0038846 20080425; KR10-2008-0042257 20080507
- Main IPC: H01L23/04
- IPC: H01L23/04 ; H01L23/12 ; H01L21/00 ; H01L23/482 ; H01L21/98

Abstract:
A wafer level chip scale package having an enhanced heat exchange efficiency with an EMF shield is presented. The wafer level chip scale package includes a semiconductor chip, an insulation layer, and a metal plate. The semiconductor chip has a plurality of bonding pads on an upper face thereof. The insulation layer is disposed over the upper face of the semiconductor chip and has openings that expose some portions of the bonding pads. The metal plate covers an upper face of the insulation layer and side faces of the semiconductor chip in which the metal plate is electrically insulated from the bonding pads.
Information query
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