发明申请
US20090193184A1 Hybrid 2-Level Mapping Tables for Hybrid Block- and Page-Mode Flash-Memory System
审中-公开
用于混合块和页模式闪存系统的混合二级映射表
- 专利标题: Hybrid 2-Level Mapping Tables for Hybrid Block- and Page-Mode Flash-Memory System
- 专利标题(中): 用于混合块和页模式闪存系统的混合二级映射表
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申请号: US12418550申请日: 2009-04-03
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公开(公告)号: US20090193184A1公开(公告)日: 2009-07-30
- 发明人: Frank Yu , Charles C. Lee , Abraham C. Ma , Myeongjin Shin
- 申请人: Frank Yu , Charles C. Lee , Abraham C. Ma , Myeongjin Shin
- 申请人地址: US CA San Jose
- 专利权人: SUPER TALENT ELECTRONICS INC.
- 当前专利权人: SUPER TALENT ELECTRONICS INC.
- 当前专利权人地址: US CA San Jose
- 主分类号: G06F12/02
- IPC分类号: G06F12/02 ; G06F12/00
摘要:
A hybrid solid-state disk (SSD) has multi-level-cell (MLC) or single-level-cell (SLC) flash memory, or both. SLC flash may be emulated by MLC that uses fewer cell states. A NVM controller converts logical block addresses (LBA) to physical block addresses (PBA). Most data is block-mapped and stored in MLC flash, but some critical or high-frequency data is page-mapped to reduce block-relocation copying. A hybrid mapping table has a first-level and a second level. Only the first level is used for block-mapped data, but both levels are used for page-mapped data. The first level contains a block-page bit that indicates if the data is block-mapped or page-mapped. A PBA field in the first-level table maps block-mapped data, while a virtual field points to the second-level table where the PBA and page number is stored for page-mapped data. Page-mapped data is identified by a frequency counter or sector count. SRAM space is reduced.
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