公开(公告)号：US20090193184A1

公开(公告)日：2009-07-30

申请号：US12418550

申请日：2009-04-03

申请人： Frank Yu ,  Charles C. Lee ,  Abraham C. Ma ,  Myeongjin Shin

发明人： Frank Yu ,  Charles C. Lee ,  Abraham C. Ma ,  Myeongjin Shin

IPC分类号： G06F12/02 ,  G06F12/00

CPC分类号： G06F12/0246 ,  G06F2212/7203 ,  G06F2212/7208 ,  G11C11/5628 ,  G11C11/5678 ,  G11C13/00 ,  G11C13/0004 ,  G11C2211/5641

摘要： A hybrid solid-state disk (SSD) has multi-level-cell (MLC) or single-level-cell (SLC) flash memory, or both. SLC flash may be emulated by MLC that uses fewer cell states. A NVM controller converts logical block addresses (LBA) to physical block addresses (PBA). Most data is block-mapped and stored in MLC flash, but some critical or high-frequency data is page-mapped to reduce block-relocation copying. A hybrid mapping table has a first-level and a second level. Only the first level is used for block-mapped data, but both levels are used for page-mapped data. The first level contains a block-page bit that indicates if the data is block-mapped or page-mapped. A PBA field in the first-level table maps block-mapped data, while a virtual field points to the second-level table where the PBA and page number is stored for page-mapped data. Page-mapped data is identified by a frequency counter or sector count. SRAM space is reduced.

摘要翻译： 混合固态盘（SSD）具有多级单元（MLC）或单级单元（SLC）闪存，或两者兼有。 SLC闪存可能由使用较少单元状态的MLC仿真。 NVM控制器将逻辑块地址（LBA）转换为物理块地址（PBA）。 大多数数据被块映射并存储在MLC闪存中，但是一些关键或高频数据被页映射以减少块重定位复制。 混合映射表具有第一级和第二级。 只有第一级用于块映射数据，但是这两个级别都用于页映射数据。 第一级包含一个块页位，指示数据是块映射还是页映射。 第一级表中的PBA字段映射块映射数据，而虚拟字段指向存储页面映射数据的PBA和页码的二级表。 页面映射数据由频率计数器或扇区计数来标识。 SRAM空间减少。

公开(公告)号：US08266367B2

公开(公告)日：2012-09-11

申请号：US12475457

申请日：2009-05-29

申请人： Frank Yu ,  Charles C. Lee ,  Abraham C. Ma ,  Myeongjin Shin

发明人： Frank Yu ,  Charles C. Lee ,  Abraham C. Ma ,  Myeongjin Shin

IPC分类号： G06F12/00 ,  G06F13/00 ,  G06F13/28

CPC分类号： G06F12/0246 ,  G06F3/0608 ,  G06F3/0631 ,  G06F3/0688 ,  G06F2212/7203 ,  G06F2212/7208 ,  G11C11/5678 ,  G11C13/0004 ,  G11C29/765

摘要： Truncation reduces the available striped data capacity of all flash channels to the capacity of the smallest flash channel. A solid-state disk (SSD) has a smart storage switch salvages flash storage removed from the striped data capacity by truncation. Extra storage beyond the striped data capacity is accessed as scattered data that is not striped. The size of the striped data capacity is reduced over time as more bad blocks appear. A first-level striping map stores striped and scattered capacities of all flash channels and maps scattered and striped data. Each flash channel has a Non-Volatile Memory Device (NVMD) with a lower-level controller that converts logical block addresses (LBA) to physical block addresses (PBA) that access flash memory in the NVMD. Wear-leveling and bad block remapping are preformed by each NVMD. Source and shadow flash blocks are recycled by the NVMD. Two levels of smart storage switches enable three-level controllers.

摘要翻译： 截断将所有闪存通道的可用条带数据容量减小到最小闪存通道的容量。 固态磁盘（SSD）具有智能存储交换机，通过截断来保护从条带数据容量中移除的闪存存储。 超出条带数据容量的额外存储被访问为不带条纹的分散数据。 随着更多的坏块出现，条带数据容量的大小随着时间的推移而减少。 一级条形图存储所有闪存通道的条纹和分散容量，并映射散射和条纹数据。 每个闪存通道都具有一个非易失性存储器件（NVMD），该器件具有将逻辑块地址（LBA）转换为访问NVMD中闪存的物理块地址（PBA）的低级别控制器。 磨损平整和坏块重映射由每个NVMD进行。 源和阴影闪存块由NVMD回收。 两级智能存储交换机支持三级控制器。

公开(公告)号：US20090240873A1

公开(公告)日：2009-09-24

申请号：US12475457

申请日：2009-05-29

申请人： Frank Yu ,  Charles C. Lee ,  Abraham C. Ma ,  Myeongjin Shin

发明人： Frank Yu ,  Charles C. Lee ,  Abraham C. Ma ,  Myeongjin Shin

IPC分类号： G06F12/00 ,  G06F12/02 ,  H03M13/00

CPC分类号： G06F12/0246 ,  G06F3/0608 ,  G06F3/0631 ,  G06F3/0688 ,  G06F2212/7203 ,  G06F2212/7208 ,  G11C11/5678 ,  G11C13/0004 ,  G11C29/765

摘要： Truncation reduces the available striped data capacity of all flash channels to the capacity of the smallest flash channel. A solid-state disk (SSD) has a smart storage switch salvages flash storage removed from the striped data capacity by truncation. Extra storage beyond the striped data capacity is accessed as scattered data that is not striped. The size of the striped data capacity is reduced over time as more bad blocks appear. A first-level striping map stores striped and scattered capacities of all flash channels and maps scattered and striped data. Each flash channel has a Non-Volatile Memory Device (NVMD) with a lower-level controller that converts logical block addresses (LBA) to physical block addresses (PBA) that access flash memory in the NVMD. Wear-leveling and bad block remapping are preformed by each NVMD. Source and shadow flash blocks are recycled by the NVMD. Two levels of smart storage switches enable three-level controllers.

摘要翻译： 截断将所有闪存通道的可用条带数据容量减小到最小闪存通道的容量。 固态磁盘（SSD）具有智能存储交换机，通过截断来保护从条带数据容量中移除的闪存存储。 超出条带数据容量的额外存储被访问为不带条纹的分散数据。 随着更多的坏块出现，条带数据容量的大小随着时间的推移而减少。 一级条形图存储所有闪存通道的条纹和分散容量，并映射散射和条纹数据。 每个闪存通道都具有一个非易失性存储器件（NVMD），该器件具有将逻辑块地址（LBA）转换为访问NVMD中闪存的物理块地址（PBA）的低级别控制器。 磨损平整和坏块重映射由每个NVMD进行。 源和阴影闪存块由NVMD回收。 两级智能存储交换机支持三级控制器。

公开(公告)号：US08200862B2

公开(公告)日：2012-06-12

申请号：US12887477

申请日：2010-09-21

申请人： Charles C. Lee ,  Frank Yu ,  Abraham C. Ma

发明人： Charles C. Lee ,  Frank Yu ,  Abraham C. Ma

IPC分类号： G06F13/12 ,  G06F13/00 ,  G06F12/02

CPC分类号： G06F13/28 ,  G11C13/0004 ,  G11C16/102 ,  G11C2216/30 ,  Y02D10/14

摘要： A flash-card reader improves transmission efficiency by using bulk streaming of multiple pipes. A bulk data-out pipe carries host write data to the card reader and can operate in parallel with a bulk data-in pipe that carries host read data that was read from a flash card attached to the card reader. Status packets do not block data packets since the he status packets are buffered through a separate status pipe, and commands are buffered through a command pipe. Flash data from multiple flash cards are interleaved as separate endpoints that share the bulk data-in pipe. A data in/out streaming state machine controls streaming bulk data through the bulk data-in and data-out pipes, while a status streaming state machine controls streaming status packets through the status pipe. Transaction overhead is reduced using bulk streaming where packets for several commands are combined into the same bulk streams.

摘要翻译： 闪存卡读卡器通过使用多个管道的批量流传输来提高传输效率。 批量数据输出管道将主机写入数据传送到读卡器，并且可以与承载从附接到读卡器的闪存卡读取的主机读取数据的批量数据输入管并行操作。 状态数据包不会阻塞数据包，因为状态数据包通过单独的状态管道进行缓冲，命令通过命令管道缓冲。 来自多个闪存卡的闪存数据被交织为共享大容量数据管道的单独端点。 数据输入/输出流状态机通过批量数据输入和数据输出管道控制流批量数据，而状态流状态机通过状态管道控制流状态数据包。 使用批量流量减少事务开销，其中几个命令的数据包被组合成相同的批量流。

公开(公告)号：US08108590B2

公开(公告)日：2012-01-31

申请号：US12139842

申请日：2008-06-16

申请人： David Q. Chow ,  Frank Yu ,  Charles C. Lee ,  Abraham C. Ma ,  Ming-Shiang Shen

发明人： David Q. Chow ,  Frank Yu ,  Charles C. Lee ,  Abraham C. Ma ,  Ming-Shiang Shen

IPC分类号： G06F12/02

CPC分类号： G06F12/0246 ,  G06F21/32 ,  G06F21/78 ,  G06F2212/1036 ,  G06F2212/7202 ,  G06F2212/7208 ,  G06K19/07 ,  G06K19/07354

摘要： A flash system has multiple channels of flash memory chips that can be accessed in parallel. Host data is assigned to one of the channels by a multi-channel controller processor and accumulated in a multi-channel page buffer. When a page boundary in the page buffer is reached, the page buffer is written to a target physical block if full, or combined with old data fragments in an Aggregating Flash Block (AFB) when the logical-sector addresses (LSA's) match. Thus small fragments are aggregated using the AFB, reducing erases and wear of flash blocks. The page buffer is copied to the AFB when a STOP command occurs. Each channel has one or more AFB's, which are tracked by an AFB tracking table.

摘要翻译： 闪存系统具有可以并行访问的多个闪存芯片的通道。 主机数据被多通道控制器处理器分配给一个通道，并且累积在多通道页缓冲器中。 当到达页面缓冲区中的页面边界时，如果逻辑扇区地址（LSA）匹配，则页缓冲区将被写入目标物理块（如果已满）或与聚合闪存块（AFB）中的旧数据片段组合。 因此，使用AFB聚集小片段，减少闪存块的擦除和磨损。 发生STOP命令时，页面缓冲区被复制到AFB。 每个通道都有一个或多个AFB，它们由AFB跟踪表进行跟踪。

公开(公告)号：US20110213921A1

公开(公告)日：2011-09-01

申请号：US13104257

申请日：2011-05-10

申请人： Frank Yu ,  Charles C. Lee ,  Abraham C. Ma

发明人： Frank Yu ,  Charles C. Lee ,  Abraham C. Ma

IPC分类号： G06F12/02

CPC分类号： G06F12/0246 ,  G06F3/061 ,  G06F3/0659 ,  G06F3/0688 ,  G06F12/0607 ,  G06F2212/7208 ,  G11C13/0004

摘要： A flash module has raw-NAND flash memory chips accessed over a physical-block address (PBA) bus by a NVM controller. The NVM controller is on the flash module or on a system board for a solid-state disk (SSD). The NVM controller converts logical block addresses (LBA) to physical block addresses (PBA). Data striping and interleaving among multiple channels of the flash modules is controlled at a high level by a smart storage transaction manager, while further interleaving and remapping within a channel may be performed by the NVM controllers. A SDRAM buffer is used by a smart storage switch to cache host data before writing to flash memory. A Q-R pointer table stores quotients and remainders of division of the host address. The remainder points to a location of the host data in the SDRAM. A command queue stores Q, R for host commands.

摘要翻译： 闪存模块具有通过NVM控制器通过物理块地址（PBA）总线访问的原始NAND闪存芯片。 NVM控制器位于闪存模块或固态硬盘（SSD）的系统板上。 NVM控制器将逻辑块地址（LBA）转换为物理块地址（PBA）。 闪存模块的多个通道之间的数据条带化和交织由智能存储事务管理器控制在高电平，而在信道内的进一步的交织和重新映射可由NVM控制器执行。 智能存储交换机使用SDRAM缓冲区，在写入闪存之前缓存主机数据。 Q-R指针表存储主机地址的商和余数。 剩余部分指向SDRAM中主机数据的位置。 命令队列存储主机命令的Q，R。

公开(公告)号：US20100122021A1

公开(公告)日：2010-05-13

申请号：US12651334

申请日：2009-12-31

申请人： Charles C. Lee ,  Frank Yu ,  Abraham C. Ma

发明人： Charles C. Lee ,  Frank Yu ,  Abraham C. Ma

IPC分类号： G06F12/00 ,  G06F12/02 ,  G06F13/00

CPC分类号： G06F3/0661 ,  G06F3/0613 ,  G06F3/0688 ,  G11C11/5678 ,  G11C13/0004 ,  G11C16/102 ,  G11C2216/30

摘要： An electronic flash-memory card has additional pipes for commands and status messages so that data pipes are not clogged with commands and status messages, allowing for a higher data throughput. The command and status pipes are activated when a UAS/BOT detector detects that a host is using a USB-Attached-SCSI (UAS) mode rather than a Bulk-Only-Transfer (BOT) mode. The host can send additional commands and data without waiting for completion of a prior command when operating in UAS mode but not while operating in BOT mode. A command queue (CQ) in the device re-orders commands for accessing flash memory and merges data in a RAM buffer. Smaller 1 KB USB packets in the data pipes are merged into larger 8 KB payloads in the RAM buffer, allowing for more efficient flash access.

摘要翻译： 电子闪存卡具有用于命令和状态消息的附加管道，使得数据管道不被命令和状态消息阻塞，从而允许更高的数据吞吐量。 当UAS / BOT检测器检测到主机正在使用USB-Attached-SCSI（UAS）模式而不是Bulk-Only-Transfer（BOT）模式时，命令和状态管道将被激活。 主机可以发送附加的命令和数据，而不必在UAS模式下操作时等待先前的命令完成，而不能在BOT模式下运行。 设备中的命令队列（CQ）重新命令用于访问闪存的命令，并将数据合并到RAM缓冲区中。 数据管道中较小的1 KB USB数据包被合并到RAM缓冲区中的较大的8 KB有效载荷中，从而实现更高效的闪存访问。

公开(公告)号：US07657692B2

公开(公告)日：2010-02-02

申请号：US11926636

申请日：2007-10-29

申请人： Charles C. Lee ,  David Q. Chow ,  Abraham C. Ma ,  Frank Yu ,  Ming-Shiang Shen ,  Horng-Yee Chou

发明人： Charles C. Lee ,  David Q. Chow ,  Abraham C. Ma ,  Frank Yu ,  Ming-Shiang Shen ,  Horng-Yee Chou

IPC分类号： G06F13/00

CPC分类号： G06F13/28 ,  G06F12/1416 ,  G06F21/32 ,  G06F21/78 ,  G06K9/00087 ,  G06K19/07 ,  G06K19/07354 ,  G07C9/00087

摘要： An extended universal-serial bus (EUSB) bridge to a host computer can have peripheral component interconnect express (PCIE) protocol layers on one side of the bridge, and EUSB layers on the other side of the bridge, with a high-level bridging converter module connecting the upper layers. The PCIE physical, data-link, and transport layers may be eliminated by integrating the bridge with an I/O controller. PCIE requests and data payloads are directly sent to the bridge, rather than low-level PCIE physical signals. The PCIE data payloads are converted to EUSB data payloads by a high-level direct bridging converter module. Then the EUSB data payloads are passed down to an EUSB transaction layer, an EUSB data-link layer, and an EUSB physical layer which drives and senses physical electrical signals on both differential pairs of the EUSB bus.

摘要翻译： 到主机的扩展通用串行总线（EUSB）桥可以在桥的一侧具有外围组件互连快速（PCIE）协议层，并且在桥的另一侧可以具有高级桥接转换器 模块连接上层。 可以通过将桥与I / O控制器集成来消除PCIE物理，数据链路和传输层。 PCIE请求和数据有效载荷直接发送到桥，而不是低级PCIE物理信号。 PCIE数据有效载荷通过高级直接桥接转换器模块转换为EUSB数据有效载荷。 然后，EUSB数据有效载荷被传递到EUSB事务层，EUSB数据链路层和EUSB物理层，其在EUSB总线的两个差分对上驱动和感测物理电信号。

公开(公告)号：US20100023682A1

公开(公告)日：2010-01-28

申请号：US12576216

申请日：2009-10-08

申请人： Charles C. Lee ,  Frank Yu ,  Abraham C. Ma

发明人： Charles C. Lee ,  Frank Yu ,  Abraham C. Ma

IPC分类号： G06F12/00 ,  G06F12/02

CPC分类号： G06F12/0246 ,  G06F12/0866 ,  G06F2212/1036 ,  G06F2212/214 ,  G06F2212/7203 ,  G06F2212/7207 ,  G11C13/0004 ,  G11C16/102 ,  G11C19/0808 ,  G11C2211/5641 ,  G11C2216/30

摘要： A flash memory solid-state-drive (SSD) has a smart storage switch that reduces write acceleration that occurs when more data is written to flash memory than is received from the host. Page mapping rather than block mapping reduces write acceleration. Host commands are loaded into a Logical-Block-Address (LBA) range FIFO. Entries are sub-divided and portions invalidated when a new command overlaps an older command in the FIFO. Host data is aligned to page boundaries with pre- and post-fetched data filling in to the boundaries. Repeated data patterns are detected and encoded by compressed meta-data codes that are stored in meta-pattern entries in a meta-pattern cache of a meta-pattern flash block. The sector data is not written to flash. The meta-pattern entries are located using a meta-data mapping table. Storing host CRC's for comparison to incoming host data can detect identical data writes that can be skipped, avoiding a write to flash.

摘要翻译： 闪存固态驱动器（SSD）具有智能存储交换机，可以减少写入快速写入的速度，而写入速度会比从主机接收到的更多的数据写入闪存。 页面映射而不是块映射减少写入加速。 主机命令加载到逻辑块地址（LBA）范围FIFO中。 当新命令与FIFO中的旧命令重叠时，条目被分割，部分无效。 主机数据与页边界对齐，前后获取的数据填充到边界。 通过存储在元模式闪存块的元模式高速缓存中的元模式条目中的压缩元数据代码来检测和编码重复的数据模式。 扇区数据未写入闪存。 使用元数据映射表定位元模式条目。 存储主机CRC用于与传入主机数据进行比较可以检测可跳过的相同数据写入，避免写入闪存。

公开(公告)号：US08452912B2

公开(公告)日：2013-05-28

申请号：US12576216

申请日：2009-10-08

申请人： Charles C. Lee ,  Frank Yu ,  Abraham C. Ma

发明人： Charles C. Lee ,  Frank Yu ,  Abraham C. Ma

IPC分类号： G06F12/00

CPC分类号： G06F12/0246 ,  G06F12/0866 ,  G06F2212/1036 ,  G06F2212/214 ,  G06F2212/7203 ,  G06F2212/7207 ,  G11C13/0004 ,  G11C16/102 ,  G11C19/0808 ,  G11C2211/5641 ,  G11C2216/30

摘要： A flash memory solid-state-drive (SSD) has a smart storage switch that reduces write acceleration that occurs when more data is written to flash memory than is received from the host. Page mapping rather than block mapping reduces write acceleration. Host commands are loaded into a Logical-Block-Address (LBA) range FIFO. Entries are sub-divided and portions invalidated when a new command overlaps an older command in the FIFO. Host data is aligned to page boundaries with pre- and post-fetched data filling in to the boundaries. Repeated data patterns are detected and encoded by compressed meta-data codes that are stored in meta-pattern entries in a meta-pattern cache of a meta-pattern flash block. The sector data is not written to flash. The meta-pattern entries are located using a meta-data mapping table. Storing host CRC's for comparison to incoming host data can detect identical data writes that can be skipped, avoiding a write to flash.

摘要翻译： 闪存固态驱动器（SSD）具有智能存储交换机，可以减少写入快速写入的速度，而写入速度会比从主机接收到的更多的数据写入闪存。 页面映射而不是块映射减少写入加速。 主机命令加载到逻辑块地址（LBA）范围FIFO中。 当新命令与FIFO中的旧命令重叠时，条目被分割，部分无效。 主机数据与页边界对齐，前后获取的数据填充到边界。 通过存储在元模式闪存块的元模式高速缓存中的元模式条目中的压缩元数据代码来检测和编码重复的数据模式。 扇区数据未写入闪存。 使用元数据映射表定位元模式条目。 存储主机CRC用于与传入主机数据进行比较可以检测可跳过的相同数据写入，避免写入闪存。