发明申请
- 专利标题： Memory Cell Layout
- 专利标题（中）： 存储单元布局
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申请号： US12040227申请日： 2008-02-29
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公开(公告)号： US20090218600A1公开(公告)日： 2009-09-03
- 发明人: Human Park , Ulrich Klostermann
- 申请人： Human Park , Ulrich Klostermann
- 主分类号： H01L29/76
- IPC分类号： H01L29/76 ; H01L21/82 ; G06F17/50
摘要：
A method for manufacturing an integrated circuit and an integrated circuit are described. In one embodiment, the method for manufacturing the integrated circuit includes determining a layout for numerous memory elements based on memory-specific parameters, and determining a layout for a front-end-of-line (FEOL) component of the integrated circuit based on electrical parameters. Once these two layouts are determined, the layouts are combined to produce a layout for a memory cell on the integrated circuit.
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