发明申请
US20090261415A1 FULLY-DEPLETED LOW-BODY DOPING FIELD EFFECT TRANSISTOR (FET) WITH REVERSE SHORT CHANNEL EFFECTS (SCE) INDUCED BY SELF-ALIGNED EDGE BACK-GATE(S)
有权
具有反向短路通道效应(SCE)的全自动低体积场效应晶体管(FET)由自对准边缘背栅(S)
- 专利标题: FULLY-DEPLETED LOW-BODY DOPING FIELD EFFECT TRANSISTOR (FET) WITH REVERSE SHORT CHANNEL EFFECTS (SCE) INDUCED BY SELF-ALIGNED EDGE BACK-GATE(S)
- 专利标题(中): 具有反向短路通道效应(SCE)的全自动低体积场效应晶体管(FET)由自对准边缘背栅(S)
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申请号: US12104683申请日: 2008-04-17
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公开(公告)号: US20090261415A1公开(公告)日: 2009-10-22
- 发明人: James W. Adkisson , Brent A. Anderson , Andres Bryant , William F. Clark, JR. , Edward J. Nowak
- 申请人: James W. Adkisson , Brent A. Anderson , Andres Bryant , William F. Clark, JR. , Edward J. Nowak
- 主分类号: H01L49/00
- IPC分类号: H01L49/00 ; H01L21/00
摘要:
Disclosed are embodiments of a field effect transistor (FET) and, more particularly, a fully-depleted, thin-body (FDTB) FET that allows for scaling with minimal short channel effects, such as drain induced barrier lowering (DIBL) and saturation threshold voltage (Vtsat) roll-off, at shorter channel lengths. The FDTB FET embodiments are configured with either an edge back-gate or split back-gate that can be biased in order to selectively adjust the potential barrier between the source/drain regions and the channel region for minimizing off-state leakage current between the drain region and the source region and/or for varying threshold voltage. These unique back-gate structures avoid the need for halo doping to ensure linear threshold voltage (Vtlin) roll-up at smaller channel lengths and, thus, avoid across-chip threshold voltage variations due to random doping fluctuations. Also disclosed are method embodiments for forming such FETs.