Invention Application
- Patent Title: MANUFACTURING METHOD OF THIN FILM TRANSISTOR INCLUDING LOW RESISTANCE CONDUCTIVE THIN FILMS
- Patent Title (中): 具有低电阻导电薄膜的薄膜晶体管的制造方法
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Application No.: US12499559Application Date: 2009-07-08
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Publication No.: US20090269881A1Publication Date: 2009-10-29
- Inventor: Mamoru FURUTA , Takashi Hirao , Hiroshi Furuta , Tokiyoshi Matsuda , Takahiro Hiramatsu , Hiromitsu Ishii , Hitoshi Hokari , Motohiko Yoshida
- Applicant: Mamoru FURUTA , Takashi Hirao , Hiroshi Furuta , Tokiyoshi Matsuda , Takahiro Hiramatsu , Hiromitsu Ishii , Hitoshi Hokari , Motohiko Yoshida
- Applicant Address: JP Kochi-shi JP Tokyo
- Assignee: Kochi Industrial Promotion Center,Casio Computer Co., Ltd.
- Current Assignee: Kochi Industrial Promotion Center,Casio Computer Co., Ltd.
- Current Assignee Address: JP Kochi-shi JP Tokyo
- Priority: JP2006-26320 20060202
- Main IPC: H01L21/336
- IPC: H01L21/336

Abstract:
A manufacturing method of a thin film transistor includes forming a pair of source/drain electrodes on a substrate, such that the source/drain electrodes define a gap therebetween; forming low resistance conductive thin films, which define a gap therebetween, on the source/drain electrodes; and forming an oxide semiconductor thin film layer on upper surface of the low resistance conductive thin films and in the gap defined between the low resistance conductive thin films so that the oxide semiconductor thin film layer functions as a channel. The low resistance conductive thin films and the oxide semiconductor thin film layer are etched so that side surfaces of the resistance conductive thin films and corresponding side surfaces of the oxide semiconductor thin film layer coincide with each other in a channel width direction of the channel. A gate electrode is mounted over the oxide semiconductor thin film layer.
Public/Granted literature
- US07981734B2 Manufacturing method of thin film transistor including low resistance conductive thin films Public/Granted day:2011-07-19
Information query
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