发明申请
- 专利标题: DLL circuit
- 专利标题(中): DLL电路
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申请号: US12453764申请日: 2009-05-21
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公开(公告)号: US20090289676A1公开(公告)日: 2009-11-26
- 发明人: Yasuhiro Takai
- 申请人: Yasuhiro Takai
- 专利权人: Elpida Memory, Inc.
- 当前专利权人: Elpida Memory, Inc.
- 优先权: JP2008-134775 20080522
- 主分类号: H03L7/06
- IPC分类号: H03L7/06 ; H03L7/00
摘要:
A DLL circuit includes a coarse delay adjustment circuit and a fine delay adjustment circuit, which further includes a first fine delay circuit and a second fine delay circuit serving as an interpolation circuit. The coarse delay adjustment circuit delays a reference clock signal by a plurality of delay stages so as to provide the first fine delay circuit with two phase signals having the phase difference of two delay stages, which are then converted into two delay signals having the phase difference of one delay stage. The delay signals are subjected to interpolation, thus producing an output clock signal. Due to a reduction of the phase difference in the first fine delay circuit, it is possible to reduce the minimum operation cycle of the interpolation circuit and to thereby increase the maximum operation frequency of the DLL circuit.
公开/授权文献
- US07839191B2 DLL circuit 公开/授权日:2010-11-23