Invention Application
US20100013079A1 PACKAGE SUBSTRATE, SEMICONDUCTOR PACKAGE HAVING A PACKAGE SUBSTRATE
审中-公开
封装基板,具有封装基板的半导体封装
- Patent Title: PACKAGE SUBSTRATE, SEMICONDUCTOR PACKAGE HAVING A PACKAGE SUBSTRATE
- Patent Title (中): 封装基板,具有封装基板的半导体封装
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Application No.: US12504209Application Date: 2009-07-16
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Publication No.: US20100013079A1Publication Date: 2010-01-21
- Inventor: In-Sik Cho , Yong-Kwan Lee , Cheol-Joon Yoo
- Applicant: In-Sik Cho , Yong-Kwan Lee , Cheol-Joon Yoo
- Applicant Address: KR Suwon-si
- Assignee: Samsung Electronics Co., Ltd
- Current Assignee: Samsung Electronics Co., Ltd
- Current Assignee Address: KR Suwon-si
- Priority: KR2008-70532 20080721
- Main IPC: H01L23/28
- IPC: H01L23/28

Abstract:
A package substrate may include an insulating substrate, a circuit pattern and a mold gate pattern. The insulating pattern may have a mold gate region through which a molding member may pass. The circuit pattern may be formed on the insulating substrate. The mold gate pattern may be formed on the mold gate region of the insulating substrate. The mold gate pattern may include a polymer having relatively strong adhesion strength with respect to the insulating substrate and relatively weak adhesion strength with respect to the molding member. Thus, costs of the package substrate and the semiconductor package may be decreased.
Information query
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