公开(公告)号：US07939924B2

公开(公告)日：2011-05-10

申请号：US11976253

申请日：2007-10-23

申请人： Cheol-Joon Yoo

发明人： Cheol-Joon Yoo

IPC分类号： H01L23/02

CPC分类号： H01L25/0657 ,  H01L24/73 ,  H01L25/105 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2224/8592 ,  H01L2225/0651 ,  H01L2225/06575 ,  H01L2225/06586 ,  H01L2225/1023 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/18165 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/32225

摘要： A stacked BGA package and a method for manufacturing the stacked BGA package, with reduced size and/or height of a unit package, which may also reduce an electrical connection length. The stacked BGA package may include a base BGA package having at least one semiconductor chip, and a plurality of BGA packages which are stacked on the base BGA package. A plurality of solder balls may electrically connect the base BGA package and the plurality of BGA packages and may then be sealed to reduce the likelihood of damage.

摘要翻译： 堆叠的BGA封装和用于制造堆叠的BGA封装的方法，其具有减小的单元封装的尺寸和/或高度，这也可以减小电连接长度。 堆叠的BGA封装可以包括具有至少一个半导体芯片的基底BGA封装和堆叠在基底BGA封装上的多个BGA封装。 多个焊球可以电连接基底BGA封装和多个BGA封装，然后可以被密封以减少损坏的可能性。

公开(公告)号：US20090166061A1

公开(公告)日：2009-07-02

申请号：US12318372

申请日：2008-12-29

申请人： Cheol-Joon Yoo ,  Tae-Sung Park

发明人： Cheol-Joon Yoo ,  Tae-Sung Park

IPC分类号： H05K1/00 ,  H05K3/00

CPC分类号： H05K3/0097 ,  H05K3/0052 ,  H05K2203/1554 ,  Y10T29/49124

摘要： A PCB strip, a PCB strip assembly device, and methods of fabricating a PCB strip and using a PCB strip assembly device are provided. According to example embodiments, a PCB strip may include a PCB main body including a working area based on a process execution unit, wherein the working area may be divided into a first working area and a second working area and a plurality of units on the working area arrayed with a given interval in at least a width direction of the PCB main body, wherein the plurality of units may be arrayed on the first working area and the second working area and units on the first working area may be symmetric to units on the second working area with respect to a point of symmetry at a center of width of the working area.

摘要翻译： 提供了PCB板条，PCB板组装装置以及PCB板的制造方法和PCB板组装装置。 根据示例性实施例，PCB板可以包括PCB主体，其包括基于处理执行单元的工作区域，其中工作区域可分为第一工作区域和第二工作区域以及工作区域上的多个单元 在PCB主体的至少宽度方向上以给定的间隔排列的区域，其中多个单元可以排列在第一工作区域和第二工作区域上，并且第一工作区域上的单元可以与第一工作区域上的单元对称 相对于工作区域的宽度中心处的对称点的第二工作区域。

公开(公告)号：US07284941B2

公开(公告)日：2007-10-23

申请号：US10981443

申请日：2004-11-05

申请人： Cheol-Joon Yoo

发明人： Cheol-Joon Yoo

IPC分类号： B65B21/02

CPC分类号： H01L21/6835 ,  H01L21/67132 ,  H01L21/6836 ,  H01L2221/68322 ,  H01L2221/68327

摘要： A method and apparatus for picking up a semiconductor chip, a method and apparatus for removing a semiconductor chip from a dicing tape, and a method of forming a perforated dicing tape are provided. Air may be blown through air holes in a dicing tape to at least partially separate the semiconductor chip from the dicing tape and/or create a space between the semiconductor chip to weaken the adhesion of the dicing tape to the semiconductor chip. The semiconductor chip may then be picked up by a removal member and completely removed from the dicing tape. Semiconductor chips that are not to be removed may be vacuum-suctioned to the dicing tape. UV radiation or heat may be applied to weaken the adhesion of the dicing tape. The semiconductor chip may be detected by an optical detector. Removing the semiconductor chips by air reduces stress and damage to the semiconductor chips.

摘要翻译： 提供一种用于拾取半导体芯片的方法和装置，用于从切割带去除半导体芯片的方法和装置以及形成穿孔切割带的方法。 空气可以通过切割带中的空气孔吹入，以将半导体芯片与切割带至少部分分离和/或在半导体芯片之间产生空间，以削弱切割带对半导体芯片的粘附。 半导体芯片然后可以由去除构件拾取并从切割带完全移除。 不要去除的半导体芯片可以被真空吸附到切割带上。 可以施加UV辐射或热量以削弱切割胶带的粘附。 半导体芯片可以由光学检测器检测。 用空气去除半导体芯片减少对半导体芯片的压力和损坏。

公开(公告)号：US20070049002A1

公开(公告)日：2007-03-01

申请号：US11536270

申请日：2006-09-28

申请人： Cheol-Joon Yoo

发明人： Cheol-Joon Yoo

IPC分类号： H01L21/44

CPC分类号： H01L21/563 ,  H01L24/81 ,  H01L24/83 ,  H01L2224/16225 ,  H01L2224/16237 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/83 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01079 ,  H01L2924/07811 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2224/0401

摘要： Embodiments of the invention provide a semiconductor-chip mounting body, a semiconductor device including the mounting body, and a method of packaging the semiconductor device. According to some embodiments, when a semiconductor chip is mounted on the mounting body as a flip-chip type, an encapsulation process using an encapsulation resin is not required. In some embodiments, the mounting body includes a substrate formed of a polyimide film, a conductive pattern formed of copper, a protection layer pattern formed of PSR, and an adhesive pattern formed on the protection layer pattern. The adhesive pattern can be formed of an insulating material. A plurality of holes, into which a plurality of bumps formed on the semiconductor chip are inserted to be connected to the conductive pattern, are formed in the protection layer pattern and the adhesive pattern.

摘要翻译： 本发明的实施例提供一种半导体芯片安装体，包括该安装体的半导体器件，以及一种封装半导体器件的方法。 根据一些实施例，当半导体芯片作为倒装型安装在安装体上时，不需要使用封装树脂的封装工艺。 在一些实施例中，安装体包括由聚酰亚胺膜形成的基板，由铜形成的导电图案，由PSR形成的保护层图案以及形成在保护层图案上的粘合图案。 粘合剂图案可以由绝缘材料形成。 在保护层图案和粘合剂图案中形成有在半导体芯片上形成的多个凸块插入以连接到导电图案的多个孔。

公开(公告)号：US07485959B2

公开(公告)日：2009-02-03

申请号：US11330773

申请日：2006-01-11

申请人： Cheol-Joon Yoo ,  Jin-Ho Kim ,  Hee-Jin Park ,  Tae-Sung Yoon ,  Chan-Suk Lee

发明人： Cheol-Joon Yoo ,  Jin-Ho Kim ,  Hee-Jin Park ,  Tae-Sung Yoon ,  Chan-Suk Lee

IPC分类号： H01L23/48 ,  H01L21/44

CPC分类号： H05K3/3436 ,  H01L23/3128 ,  H01L24/10 ,  H01L24/13 ,  H01L24/48 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/48091 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/351 ,  H05K3/3452 ,  H05K3/3484 ,  H05K2201/10977 ,  H05K2203/0568 ,  Y02P70/613 ,  H01L2924/00 ,  H01L2224/0401 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor package and a package mounting substrate can be joined using a conductive material column. Each of the semiconductor package and the package mounting substrate include an insulating protective opening exposing a wiring layer therein. The solder column resides within the insulating protective openings to electrically couple the wiring layers. The insulating protective openings protect the solder column against stress faults to form reliable electrical connections and to support high-density electrical connections between the semiconductor package and the package mounting substrate.

摘要翻译： 半导体封装和封装安装基板可以使用导电材料柱接合。 半导体封装和封装安装衬底中的每一个包括暴露其中的布线层的绝缘保护开口。 焊料柱位于绝缘保护开口内，以电连接布线层。 绝缘保护开口保护焊料柱免受应力故障的影响，形成可靠的电连接并支持半导体封装和封装安装基板之间的高密度电连接。

公开(公告)号：US07465142B2

公开(公告)日：2008-12-16

申请号：US10981468

申请日：2004-11-05

申请人： Cheol-Joon Yoo

发明人： Cheol-Joon Yoo

IPC分类号： B65B21/02

CPC分类号： H01L21/6835 ,  H01L21/67132 ,  H01L21/6836 ,  H01L2221/68322 ,  H01L2221/68327

摘要： A method and apparatus for picking up a semiconductor chip, a method and apparatus for removing a semiconductor chip from a dicing tape, and a method of forming a perforated dicing tape are provided. Air may be blown through air holes in a dicing tape to at least partially separate the semiconductor chip from the dicing tape and/or create a space between the semiconductor chip to weaken the adhesion of the dicing tape to the semiconductor chip. The semiconductor chip may then be picked up by a removal member and completely removed from the dicing tape. Semiconductor chips that are not to be removed may be vacuum-suctioned to the dicing tape. UV radiation or heat may be applied to weaken the adhesion of the dicing tape. The semiconductor chip may be detected by an optical detector. Removing the semiconductor chips by air reduces stress and damage to the semiconductor chips.

摘要翻译： 提供一种用于拾取半导体芯片的方法和装置，用于从切割带去除半导体芯片的方法和装置以及形成穿孔切割带的方法。 空气可以通过切割带中的空气孔吹入，以将半导体芯片与切割带至少部分分离和/或在半导体芯片之间产生空间，以削弱切割带对半导体芯片的粘附。 半导体芯片然后可以由去除构件拾取并从切割带完全移除。 不要去除的半导体芯片可以被真空吸附到切割带上。 可以施加UV辐射或热量以削弱切割胶带的粘附。 半导体芯片可以由光学检测器检测。 用空气去除半导体芯片减少对半导体芯片的压力和损坏。

公开(公告)号：US07170158B2

公开(公告)日：2007-01-30

申请号：US10186101

申请日：2002-06-27

申请人： Hee Kook Choi ,  Cheol Joon Yoo

发明人： Hee Kook Choi ,  Cheol Joon Yoo

IPC分类号： H01L23/02

CPC分类号： H01L21/565 ,  H01L23/3128 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0657 ,  H01L2224/05599 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45099 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2224/83051 ,  H01L2224/8547 ,  H01L2225/0651 ,  H01L2225/06572 ,  H01L2225/06582 ,  H01L2225/06586 ,  H01L2924/00014 ,  H01L2924/01068 ,  H01L2924/01078 ,  H01L2924/01087 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207

摘要： A multi-chip package comprises a double-sided circuit board having first and second surfaces. Each surface has a package area and a peripheral area. Each package area has a chip mounting area on which a chip is attached, and a bonding area with which the chip is electrically connected. The peripheral area of the first surface has a runner area on which molding compound flows, and the peripheral area of the second surface has external connection pattern with which the bonding areas are electrically connected. In particular, the circuit board has gate holes, which are co-located on each surface to result in a common hole.

摘要翻译： 多芯片封装包括具有第一表面和第二表面的双面电路板。 每个表面都有一个封装区域和一个外围区域。 每个封装区域具有安装芯片的芯片安装区域和与芯片电连接的接合区域。 第一表面的周边区域具有浇铸区域，模制化合物在其上流动，并且第二表面的周边区域具有与粘结区域电连接的外部连接图案。 特别地，电路板具有门孔，它们位于每个表面上以形成公共孔。

公开(公告)号：US07129585B2

公开(公告)日：2006-10-31

申请号：US10753827

申请日：2004-01-05

申请人： Cheol-Joon Yoo

发明人： Cheol-Joon Yoo

IPC分类号： H01L23/48

CPC分类号： H01L21/563 ,  H01L24/81 ,  H01L24/83 ,  H01L2224/16225 ,  H01L2224/16237 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/83 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01079 ,  H01L2924/07811 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2224/0401

摘要： Embodiments of the invention provide a semiconductor-chip mounting body, a semiconductor device including the mounting body, and a method of packaging the semiconductor device. According to some embodiments, when a semiconductor chip is mounted on the mounting body as a flip-chip type, an encapsulation process using an encapsulation resin is not required. In some embodiments, the mounting body includes a substrate formed of a polyimide film, a conductive pattern formed of copper, a protection layer pattern formed of PSR, and an adhesive pattern formed on the protection layer pattern. The adhesive pattern can be formed of an insulating material. A plurality of holes, into which a plurality of bumps formed on the semiconductor chip are inserted to be connected to the conductive pattern, are formed in the protection layer pattern and the adhesive pattern.

摘要翻译： 本发明的实施例提供一种半导体芯片安装体，包括该安装体的半导体器件，以及一种封装半导体器件的方法。 根据一些实施例，当半导体芯片作为倒装型安装在安装体上时，不需要使用封装树脂的封装工艺。 在一些实施例中，安装体包括由聚酰亚胺膜形成的基板，由铜形成的导电图案，由PSR形成的保护层图案以及形成在保护层图案上的粘合图案。 粘合剂图案可以由绝缘材料形成。 在保护层图案和粘合剂图案中形成有在半导体芯片上形成的多个凸块插入以连接到导电图案的多个孔。

公开(公告)号：US07129118B2

公开(公告)日：2006-10-31

申请号：US10621576

申请日：2003-07-18

申请人： Cheol-Joon Yoo ,  Ki-Kwon Jeong

发明人： Cheol-Joon Yoo ,  Ki-Kwon Jeong

IPC分类号： H01L21/58 ,  B23P19/00

CPC分类号： H01L21/6835 ,  H01L21/6836 ,  H01L2221/68327 ,  H01L2221/68354 ,  H01L2224/83192 ,  Y10S156/942 ,  Y10T29/53178 ,  Y10T29/53191 ,  Y10T156/1978

摘要： A method of utilizing a removable protective tape to protect the active surfaces of semiconductor wafer and the individual semiconductor chips during semiconductor packaging processes is provided along with several configurations of apparatuses that may be used in such a method for removing protective tape portions from individual semiconductor chips during the assembly process.

摘要翻译： 在半导体封装工艺期间利用可移除的保护带来保护半导体晶片和各个半导体芯片的有源表面的方法与可用于从各个半导体芯片去除保护带部分的方法中使用的几种设备一起提供 在装配过程中。

公开(公告)号：US20050095100A1

公开(公告)日：2005-05-05

申请号：US10981468

申请日：2004-11-05

申请人： Cheol-Joon Yoo

发明人： Cheol-Joon Yoo

IPC分类号： H01L21/50 ,  H01L21/00 ,  H01L21/68 ,  B65B21/02 ,  B65B69/00 ,  B65G65/04 ,  B65G65/34

CPC分类号： H01L21/6835 ,  H01L21/67132 ,  H01L21/6836 ,  H01L2221/68322 ,  H01L2221/68327

摘要： A method and apparatus for picking up a semiconductor chip, a method and apparatus for removing a semiconductor chip from a dicing tape, and a method of forming a perforated dicing tape are provided. Air may be blown through air holes in a dicing tape to at least partially separate the semiconductor chip from the dicing tape and/or create a space between the semiconductor chip to weaken the adhesion of the dicing tape to the semiconductor chip. The semiconductor chip may then be picked up by a removal member and completely removed from the dicing tape. Semiconductor chips that are not to be removed may be vacuum-suctioned to the dicing tape. UV radiation or heat may be applied to weaken the adhesion of the dicing tape. The semiconductor chip may be detected by an optical detector. Removing the semiconductor chips by air reduces stress and damage to the semiconductor chips.

摘要翻译： 提供一种用于拾取半导体芯片的方法和装置，用于从切割带去除半导体芯片的方法和装置以及形成穿孔切割带的方法。 空气可以通过切割带中的空气孔吹入，以将半导体芯片与切割带至少部分分离和/或在半导体芯片之间产生空间，以削弱切割带对半导体芯片的粘附。 半导体芯片然后可以由去除构件拾取并从切割带完全移除。 不要去除的半导体芯片可以被真空吸附到切割带上。 可以施加UV辐射或热量以削弱切割胶带的粘附。 半导体芯片可以由光学检测器检测。 用空气去除半导体芯片减少对半导体芯片的压力和损坏。