发明申请
- 专利标题: Phase-locked loop circuit, recording-and-reproducing apparatus, and electronic appratus
- 专利标题(中): 锁相环电路,记录和再现装置和电子设备
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申请号: US12458706申请日: 2009-07-21
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公开(公告)号: US20100026406A1公开(公告)日: 2010-02-04
- 发明人: Tetsuya Fujiwara , Yosuke Ueno
- 申请人: Tetsuya Fujiwara , Yosuke Ueno
- 申请人地址: JP Tokyo
- 专利权人: Sony Corporation
- 当前专利权人: Sony Corporation
- 当前专利权人地址: JP Tokyo
- 优先权: JP2008-197475 20080731
- 主分类号: H03L7/099
- IPC分类号: H03L7/099
摘要:
A phase-locked loop circuit includes a phase detection unit, a loop filter unit including a series circuit of a resistor and a capacitor, first and second pulse-current output units which supply differential and single-end pulse currents corresponding to phase information to the resistor and capacitor, an oscillating unit which varies an oscillation frequency in accordance with a voltage generated at the resistor and capacitor, and a calibration unit which obtains information of an oscillation gain in actual operation and corrects an operation of the oscillating unit on the basis of a difference between the oscillation gain in actual operation and a target oscillation gain. The oscillation gain in actual operation represents a characteristic of oscillation frequency versus input signal of the oscillating unit and is obtained using predetermined oscillation control signals on the basis of a difference between actual oscillation frequencies under the oscillation control signals.
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