发明申请
US20100099230A1 Method to manufacture split gate with high density plasma oxide layer as inter-polysilicon insulation layer
有权
用高密度等离子体氧化物层制造分裂栅的多晶硅绝缘层的方法
- 专利标题： Method to manufacture split gate with high density plasma oxide layer as inter-polysilicon insulation layer
- 专利标题（中）： 用高密度等离子体氧化物层制造分裂栅的多晶硅绝缘层的方法
-
申请号： US12589045申请日： 2009-10-16
-
公开(公告)号： US20100099230A1公开(公告)日： 2010-04-22
- 发明人: Sung-Shan Tai , Yong-Zhong Hu , François Hébert , Hong Chang , Mengyu Pan , Yingying Lou , Yu Wang
- 申请人： Sung-Shan Tai , Yong-Zhong Hu , François Hébert , Hong Chang , Mengyu Pan , Yingying Lou , Yu Wang
- 专利权人： Alpha & Omega Semiconductor, LTD
- 当前专利权人： Alpha & Omega Semiconductor, LTD
- 主分类号： H01L21/336
- IPC分类号： H01L21/336
摘要：
This invention discloses a method of manufacturing a trenched semiconductor power device with split gate filling a trench opened in a semiconductor substrate wherein the split gate is separated by an inter-poly insulation layer disposed between a top and a bottom gate segments. The method further includes a step of forming the inter-poly layer by applying a RTP process after a HDP oxide deposition process to bring an etch rate of the HDP oxide layer close to an etch rate of a thermal oxide.
公开/授权文献
信息查询
IPC分类:
