- 专利标题: SEMICONDUCTOR TEST PAD STRUCTURES
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申请号: US12267021申请日: 2008-11-07
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公开(公告)号: US20100117080A1公开(公告)日: 2010-05-13
- 发明人: Hsien-Wei Chen , Ying-Ju Chen , Yu-Wen Liu , Hao-Yi Tsai , Shin-Puu Jeng
- 申请人: Hsien-Wei Chen , Ying-Ju Chen , Yu-Wen Liu , Hao-Yi Tsai , Shin-Puu Jeng
- 申请人地址: TW Hsin-Chu
- 专利权人: Taiwan Semiconductor Manufacturing Co., Ltd.
- 当前专利权人: Taiwan Semiconductor Manufacturing Co., Ltd.
- 当前专利权人地址: TW Hsin-Chu
- 主分类号: H01L23/485
- IPC分类号: H01L23/485
摘要:
A semiconductor test pad interconnect structure with integrated die-separation protective barriers. The interconnect structure includes a plurality of stacked metal layers each having an electrically conductive test pad separated from other test pads by a dielectric material layer. In one embodiment, at least one metallic via bar is embedded into the interconnect structure and electrically interconnects each of the test pads in the metal layers together. The via bar extends substantially along an entire first side defined by each test pad in some embodiments. In other embodiments, a pair of opposing via bars may be provided that are arranged on opposite sides of a die singulation saw cut line defined in a scribe band on a semiconductor wafer.
公开/授权文献
- US08013333B2 Semiconductor test pad structures 公开/授权日:2011-09-06
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