发明申请
- 专利标题： CHIP PACKAGE STRUCTURE AND METHOD OF FABRICATING THE SAME
- 专利标题（中）： 芯片包装结构及其制造方法
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申请号： US12472359申请日： 2009-05-26
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公开(公告)号： US20100139767A1公开(公告)日： 2010-06-10
- 发明人: Jui-Ching Hsieh , Pin Chang , Chung-De Chen , Li-Chi Pan , Yu-Jen Wang , Chin-Horng Wang
- 申请人： Jui-Ching Hsieh , Pin Chang , Chung-De Chen , Li-Chi Pan , Yu-Jen Wang , Chin-Horng Wang
- 申请人地址： TW Hsinchu
- 专利权人： Industrial Technology Research Institute
- 当前专利权人： Industrial Technology Research Institute
- 当前专利权人地址： TW Hsinchu
- 优先权： TW97147409 20081205
- 主分类号： H01L31/024
- IPC分类号： H01L31/024 ; H01L23/34 ; H01L33/00 ; H01L21/50
摘要：
A chip package structure including a heat dissipation substrate, a chip and a heterojunction heat conduction buffer layer is provided. The chip is disposed on the heat dissipation substrate. The heterojunction heat conduction buffer layer is disposed between the heat dissipation substrate and the chip. The heterojunction heat conduction buffer layer includes a plurality of pillars perpendicular to the heat dissipation substrate. The aspect ratio of each pillar is between about 3:1 and 50:1.
公开/授权文献
- US07989948B2 Chip package structure and method of fabricating the same 公开/授权日：2011-08-02
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