发明申请
- 专利标题: RESISTIVE MEMORY
- 专利标题(中): 电阻记忆
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申请号: US12536341申请日: 2009-08-05
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公开(公告)号: US20100165701A1公开(公告)日: 2010-07-01
- 发明人: Yoshihiro UEDA , Kenji TSUCHIDA , Kiyotaro ITAGAKI
- 申请人: Yoshihiro UEDA , Kenji TSUCHIDA , Kiyotaro ITAGAKI
- 申请人地址: JP Tokyo
- 专利权人: KABUSHIKI KAISHA TOSHIBA
- 当前专利权人: KABUSHIKI KAISHA TOSHIBA
- 当前专利权人地址: JP Tokyo
- 优先权: JP2008-213671 20080822
- 主分类号: G11C11/00
- IPC分类号: G11C11/00 ; G11C7/02 ; G11C7/10
摘要:
A resistive memory includes a plurality of memory cells, a plurality of reference cells having mutually different resistance values, at least one sense amplifier having a first input terminal connected to one selected memory cell which is selected from the plurality of memory cells at a time of read, and a second input terminal connected to one selected reference cell which is selected from the plurality of reference cells at the time of read, and one latch circuit which holds offset information of the at least one sense amplifier. The resistive memory further includes a decoder which selects, in accordance with the offset information, the one selected reference cell from the plurality of reference cells, and connects the one selected reference cell to the second input terminal of the at least one sense amplifier.
公开/授权文献
- US08036015B2 Resistive memory 公开/授权日:2011-10-11