发明申请
- 专利标题: ON-CHIP REDUNDANCY HIGH-RELIABLE SYSTEM AND METHOD OF CONTROLLING THE SAME
- 专利标题(中): 片上冗余高可靠性系统及其控制方法
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申请号: US12389194申请日: 2009-02-19
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公开(公告)号: US20100207681A1公开(公告)日: 2010-08-19
- 发明人: Nobuyasu Kanekawa , Ryoichi Kobayashi , Tomonobu Koseki , Katsuya Oyama
- 申请人: Nobuyasu Kanekawa , Ryoichi Kobayashi , Tomonobu Koseki , Katsuya Oyama
- 申请人地址: JP Tokyo
- 专利权人: Hitachi, Ltd.
- 当前专利权人: Hitachi, Ltd.
- 当前专利权人地址: JP Tokyo
- 主分类号: G06F11/16
- IPC分类号: G06F11/16
摘要:
The present invention is directed to improve reliably of an on-chip redundancy system by preventing influence of a physical failure exerted on an entire semiconductor chip. A comparator measure for comparing outputs of an on-chip redundancy system is mounted on a semiconductor chip different from the on-chip redundancy system. The another semiconductor chip is, preferably, mounted on a semiconductor chip on which a power source circuit for supplying power to the on-chip redundancy system redundantly having the comparing function in the chip, a driver circuit for driving an output circuit, and the like are mounted. With the configuration, the influence of a failure occurring in the on-chip redundancy system can be prevented from being exerted on the comparator measure.
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