摘要:
A comparator circuit for comparing outputs of an on-chip redundant system is mounted on a second semiconductor chip that is separate from the on-chip redundant system. The second semiconductor chip which preferably contains a power source circuit for supplying power to the on-chip redundant system, a driver circuit for driving an output circuit, and the like are mounted. With this configuration, the influence of a failure occurring in the on-chip redundancy system can be prevented from being exerted on the comparator measure.
摘要:
The present invention is directed to improve reliably of an on-chip redundancy system by preventing influence of a physical failure exerted on an entire semiconductor chip. A comparator measure for comparing outputs of an on-chip redundancy system is mounted on a semiconductor chip different from the on-chip redundancy system. The another semiconductor chip is, preferably, mounted on a semiconductor chip on which a power source circuit for supplying power to the on-chip redundancy system redundantly having the comparing function in the chip, a driver circuit for driving an output circuit, and the like are mounted. With the configuration, the influence of a failure occurring in the on-chip redundancy system can be prevented from being exerted on the comparator measure.
摘要:
This resolver/digital converter has a resolver, a resolver/digital converting portion and an exciting signal generator. The exciting signal generated from the exciting signal generator is supplied to the resolver, and the resolver signals produced from the resolver are supplied to the resolver/digital converter. This resolver/digital converter further has a conversion trigger generator that generates a conversion trigger signal on the basis of the exciting signal generated from the exciting signal generator, an A/D converter that converts the resolver signals produced from the resolver to digital values in response to the conversion trigger signal generated from the conversion trigger generator, and computing means that detects the failure status on the basis of the digital values produced from the A/D converter.
摘要:
A small-sized and low-cost phase detection circuit which has improved noise immunity. The phase detection circuit comprises a multiplier for multiplying an input signal by a reference signal and outputting a first signal, an integration circuit for integrating the first signal and outputting a second signal, a phase estimation circuit for estimating phase information based on the second signal, and a reference signal generation circuit for generating the reference signal based on the estimated phase information. Since the phase is detected based on information representing an entire waveform, the influence of local noise can be diluted and noise immunity can be improved.
摘要:
A small-sized and low-cost phase detection circuit which has improved noise immunity. The phase detection circuit comprises a multiplier for multiplying an input signal by a reference signal and outputting a first signal, an integration circuit for integrating the first signal and outputting a second signal, a phase estimation circuit for estimating phase information based on the second signal, and a reference signal generation circuit for generating the reference signal based on the estimated phase information. Since the phase is detected based on information representing an entire waveform, the influence of local noise can be diluted and noise immunity can be improved.
摘要:
This resolver/digital converter has a resolver, a resolver/digital converting portion and an exciting signal generator. The exciting signal generated from the exciting signal generator is supplied to the resolver, and the resolver signals produced from the resolver are supplied to the resolver/digital converter. This resolver/digital converter further has a conversion trigger generator that generates a conversion trigger signal on the basis of the exciting signal generated from the exciting signal generator, an A/D converter that converts the resolver signals produced from the resolver to digital values in response to the conversion trigger signal generated from the conversion trigger generator, and computing means that detects the failure status on the basis of the digital values produced from the A/D converter.
摘要:
This resolver/digital converter has a resolver, a resolver/digital converting portion and an exciting signal generator. The exciting signal generated from the exciting signal generator is supplied to the resolver, and the resolver signals produced from the resolver are supplied to the resolver/digital converter. This resolver/digital converter further has a conversion trigger generator that generates a conversion trigger signal on the basis of the exciting signal generated from the exciting signal generator, an A/D converter that converts the resolver signals produced from the resolver to digital values in response to the conversion trigger signal generated from the conversion trigger generator, and computing means that detects the failure status on the basis of the digital values produced from the A/D converter.
摘要:
This resolver/digital converter has a resolver, a resolver/digital converting portion and an exciting signal generator. The exciting signal generated from the exciting signal generator is supplied to the resolver, and the resolver signals produced from the resolver are supplied to the resolver/digital converter. This resolver/digital converter further has a conversion trigger generator that generates a conversion trigger signal on the basis of the exciting signal generated from the exciting signal generator, an A/D converter that converts the resolver signals produced from the resolver to digital values in response to the conversion trigger signal generated from the conversion trigger generator, and computing means that detects the failure status on the basis of the digital values produced from the A/D converter.
摘要:
The present invention provides an electric power steering controller and an electric power steering system that allow appropriate operation even when the operation of their torque sensors is abnormal.The controller 100 of a main microcomputer 1-1 outputs motor drive signals 3 to a drive circuit 5 based on first and second torque signals detected by a torque sensor 2 that detects steering force. The drive circuit 5 drives a motor 6 to generate assistive torque. A torque sensor abnormality detector 101 is installed within the main microcomputer 1-1 and detects abnormalities of the torque sensor 2 based on the first and second torque signals. An excessive torque detector 102 is installed within an external device 1-2 and outputs a motor stop signal when either of the first and second torque signals exceeds a given value.
摘要:
A loss (generation of heat) is reduced in a capacitor precharge circuit, thereby reducing the size of the circuit.The capacitor precharge circuit according to the present invention divides a power supply voltage using a switched capacitor voltage divider circuit, thereby carrying out charging while suppressing a both-terminal voltage of the capacitor that is subject to the charging (refer to FIG. 1).